Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Sammy A. Butler

dblp:182/0064 · DBLP profile ↗
← Back
2ranked-venue papers
0as first author
0since 2021 · last 1961
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.021961
Esaki Diode NOT-OR Logic Circuits · IRE Trans. Electron. Comput. 1961
Esaki Diode Logic Circuits · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital circuit design › logic families
tunnel diode logic circuits
0.021961
Esaki Diode NOT-OR Logic Circuits · IRE Trans. Electron. Comput. 1961
Esaki Diode Logic Circuits · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital circuit design
logic design
0.011961
Esaki Diode NOT-OR Logic Circuits · IRE Trans. Electron. Comput. 1961
Integrated circuit design › digital circuit design › sequential circuit design
shift register
0.011960
Esaki Diode Logic Circuits · IRE Trans. Electron. Comput. 1960

Methods — techniques the papers use, named apart from their topics

tolerance analysis · 0.0negative resistance biasing · 0.0OR-DELAY circuit · 0.0
YearPublicationVenuePosition
1961 Esaki Diode NOT-OR Logic Circuits
abstract
A basic technique is presented which enables the development of Esaki diode NOT-OR logic circuits. Two embodiments of the basic scheme are discussed, which, when combined with an OR-DELAY circuit, provide a logically complete system. Emphasis is placed on the more economical of the two embodiments. A tolerance analysis is included, which demonstrates that the technique enables the practical design of logic circuits. The requirements placed on Esaki diode characteristics, and the speed limitations of the circuits, are discussed. Examples of working circuits are shown, including photographs of voltage wave shapes.
Hannon S. Yourke, Sammy A. Butler, William G. Strohm
IRE Trans. Electron. Comput.2
1960 Esaki Diode Logic Circuits
abstract
The Esaki diode is a potentially low-cost, high-speed two-terminal device exhibiting a short-circuit-stable negative resistance over a portion of its volt-ampere characteristic. By proper biasing and loading, it can be used to perform power amplification and memory functions. In this paper, a variety of digital computer circuits (a result of an early exploratory program) is described which utilizes the above properties. In particular, shift registers, triggers, and counters are presented. The following shift registers are described: 1) A register which consists of one Esaki diode and one conventional diode per stage. Shifting is accomplished with a two-phase square-wave drive. The Esaki diode provides memory and power gain, and the conventional diode provides a unilateral flow of information. 2) A register which combines Esaki diodes with square-loop ferromagnetic cores. Again the Esaki diode provides memory and power gain. Upon application of a single-phase drive, the cores perform a gating operation depending upon the state of the diodes. 3) With the use of Esaki diode-transistor combinations, high-speed circuits are obtained which depend upon the Esaki diodes primarily for memory and the transistors for power gain and unilateral flow of information. The flip-flop and counter circuits to be presented are the following: 1) A binary counter using Esaki diodes with magnetic cores; 2) high-speed flipflops using Esaki diode-transistor combinations.
Gordon W. Neff, Sammy A. Butler, Dale L. Critchlow
IRE Trans. Electron. Comput.2