EDBT 2026 Demo / reviewers in the wild / expert
S. C. Chao
dblp:182/9803
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1960
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1959 | A Generalized Resistor-Transistor Logic Circuit and Some Applications · IRE Trans. Electron. Comput. 1959 |
Integrated circuit design › digital circuit design › threshold logic
threshold logic circuits |
0.0 | 1 | 1959 | A Generalized Resistor-Transistor Logic Circuit and Some Applications · IRE Trans. Electron. Comput. 1959 |
Integrated circuit design › digital circuit design
arithmetic circuit design |
0.0 | 1 | 1959 | A Generalized Resistor-Transistor Logic Circuit and Some Applications · IRE Trans. Electron. Comput. 1959 |
Integrated circuit design › digital circuit design › arithmetic circuit design
full adder |
0.0 | 1 | 1959 | A Generalized Resistor-Transistor Logic Circuit and Some Applications · IRE Trans. Electron. Comput. 1959 |
Methods — techniques the papers use, named apart from their topics
discrete transistor circuit design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1960 | Generalized RTL Circuitsߝ Supplementary
S. C. Chao |
IRE Trans. Electron. Comput. | 1 |
| 1959 | A Generalized Resistor-Transistor Logic Circuit and Some ApplicationsabstractThis paper discusses a generalized resistor-transistor logic circuit; i.e., the output produces a signal when any m out of the n inputs are ``on.'' Practical limitations such as using precision power supplies and components are discussed. However, for smaller values of n and m, circuits could be designed such that no special precision components and supplies would be required. Several practical circuits are worked out, including a two-transistor binary full adder, a three-transistor comparator and a one-transistor-per-bit-ring counter. These circuits, especially the first two, are uniquely simple and low in cost. They can be incorporated with other circuits to simplify a digital system. It is felt that with ordinary supplies (less than 5 per cent voltage variation) and 1 to 5 per cent resistors, these circuits can be designed to be very reliable as one would expect from conventional circuits. The slight increase in cost of power supplies and components, if any, is, in many cases, over compensated by the simplicity of these circuits. Experimental circuits employing germanium alloy junction transistors operate successfully at pulse rate up to 500 kc and an ambient temerature of 50°C. S. C. Chao |
IRE Trans. Electron. Comput. | 1 |