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Harold M. Lucal

dblp:183/3398 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1959
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 67% Hardware reliability and fault tolerance · 33%
Theoretical computer science
1 paper
Coding theory · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital circuit design › arithmetic circuit design
adder design
0.011959
Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code · IRE Trans. Electron. Comput. 1959
Hardware reliability and fault tolerance › error detection
arithmetic unit error detection
0.011959
Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code · IRE Trans. Electron. Comput. 1959
Integrated circuit design
digital arithmetic circuits
0.011959
Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code · IRE Trans. Electron. Comput. 1959
Coding theory › error-correcting codes
error detection
0.011959
Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code · IRE Trans. Electron. Comput. 1959
Coding theory › error-correcting codes › error detection
parity check
0.011959
Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code · IRE Trans. Electron. Comput. 1959

Methods — techniques the papers use, named apart from their topics

reflected binary code · 0.0gray code · 0.0
YearPublicationVenuePosition
1959 Arithmetic Operations for Digital Computers Using a Modified Reflected Binary Code
abstract
The reflected binary or Gray code has been used chiefly in analog-to-digital conversion devices because its code sequences, representing any two consecutive integral numbers, differ in only one digit. This paper presents a method for performing the arithmetic operations of addition, subtraction, multiplication, and division using a modified reflected binary code. The modification for integral numbers is essentially the addition of an even parity check bit to the Gray code representation. This facilitates both the arithmetic operations and the detection of errors-in the arithmetic process as well as in transmission. An adder using this code requires circuitry which is more complex than that of a conventional binary adder by a factor of about two or three. However, the adder can be used also for subtraction with little additional circuitry and without complementation. In applications where reliability requirements justify the extra circuitry needed for arithmetic error detection, the modified reflected binary code may compare favorably with the conventional binary.
Harold M. Lucal
IRE Trans. Electron. Comput.1