Mireya Zapata

dblp:184/7824 · also Mireya Zapata-Rodríguez · DBLP profile ↗
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17ranked-venue papers
3as first author
13since 2021 · last 2026
0000-0003-3382-2724ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 7 · 2 first-author · 3 since 2021Applied, interdisciplinary, general and emerging computing · 7 · 1 first-author · 7 since 2021Systems, architecture and hardware · 2 · 2 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Human-computer interaction and ubiquitous computing · 1 · 1 since 2021
YearPublicationVenuePosition
2026 MobileTestPro: A Real-World Evaluation
Michelle Paredes, Danilo Martínez, Mireya Zapata, Marcelo Rea
ICCSA (3)3
2026 Shared Autonomy for an Omnidirectional Robot with SLAM and Collision Avoidance
Mireya Zapata, Alejandro Camino, Vannesa Vargas, Pablo Ramos
ICCSA (3)1
2026 nanoHEENS: Biomimetic Near-Memory-Computing 16-Core SIMD Processor Node for Evolutive Spiking Neural Networks
Arnau Larre-Alos, Bernardo Vallejo Mancero, Victor Torres, Mireya Zapata, Juan Manuel Moreno, Jordi Cosp, Jordi Madrenas
ISCAS5
2025 MobileTestPro: Testing Framework for Mobile Application
Jorge Romero-Collaguazo, Danilo Martínez, Mireya Zapata, Xavier Ferré
ICCSA (3)3
2025 Learning Through Play: Implementing an Educational Escape Room for Teaching Traditions and Culture
Kevin Valencia-Aragón, Hugo Arias-Flores, Mireya Zapata, Luis Aguirre-Morales, Sandra Sanchez-Gordon
ICEC3
2024 Real-time hardware emulation of neural cultures: A comparative study of in vitro, in silico and in duris silico models
abstract
Biological neural networks are well known for their capacity to process information with extremely low power consumption. Fields such as Artificial Intelligence, with high computational costs, are seeking for alternatives inspired in biological systems. An inspiring alternative is to implement hardware architectures that replicate the behavior of biological neurons but with the flexibility in programming capabilities of an electronic device, all combined with a relatively low operational cost. To advance in this quest, here we analyze the capacity of the HEENS hardware architecture to operate in a similar manner as an in vitro neuronal network grown in the laboratory. For that, we considered data of spontaneous activity in living neuronal cultures of about 400 neurons and compared their collective dynamics and functional behavior with those obtained from direct numerical simulations (in silico) and hardware implementations (in duris silico). The results show that HEENS is capable to mimic both the in vitro and in silico systems with high efficient-cost ratio, and on different network topological designs. Our work shows that compact low-cost hardware implementations are feasible, opening new avenues for future, highly efficient neuromorphic devices and advanced human-machine interfacing.
Bernardo Vallejo Mancero, Sergio Faci-Lázaro, Mireya Zapata, Jordi Soriano, Jordi Madrenas
Neural Networks3
2023 Real-Time Adaptive Physical Sensor Processing with SNN Hardware
Jordi Madrenas, Bernardo Vallejo Mancero, Josep Angel Oltra, Mireya Zapata, Jordi Cosp, Robert Calatayud, Satoshi Moriya, Shigeo Sato
ICANN (5)4
2023 Design and Implementation of Wind-Powered Charging System to Improve Electric Motorcycle Autonomy
Luis Felipe Changoluisa, Mireya Zapata
ICCSA (1)2
2022 Real-Time Display of Spiking Neural Activity of SIMD Hardware Using an HDMI Interface
Bernardo Vallejo Mancero, Clément Nader, Jordi Madrenas, Mireya Zapata
ICANN (3)4
2021 Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge
abstract
This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). As such, the hardware implementation of Single Instruction Multiple Data (SIMD)-based Spiking Neural Network (SNN) requires the development of user-friendly and efficient toolchain in order to maximise the potential that the architecture brings. By using a novel SNN architecture, a custom designed hardware/software toolchain has been developed. The toolchain performance has been experimentally checked on a Band-Pass Filter (BPF), obtaining optimized code and data.
Josep Angel Oltra, Jordi Madrenas, Mireya Zapata, Bernardo Vallejo Mancero, Diana Mata-Hernandez, Shigeo Sato
ISCAS3
2021 The Communication Between Client-Developer in the Process of Requirements Elicitation for a Software Project
Sebastián Alvarez, Kevin Duy, Mireya Zapata, Jorge Galarza, Danilo Martínez, Carlos Puco
WorldCIST (4)3
2021 Unreadable Code in Novice Developers
Daniel Avila, Edison Báez, Mireya Zapata, Diego Zurita, Danilo Martínez
WorldCIST (4)3
2021 Usability Evaluation on Mobile Devices, Practical Case
Danilo Martínez, Mireya Zapata, Renan Garcia, Andrés Zambrano, Jhony Naranjo, Kevin Zurita
WorldCIST (3)2
2018 SNAVA - A real-time multi-FPGA multi-model spiking neural network simulation architecture
T. A. Athul Sripad, Giovanny Sánchez, Mireya Zapata, Vito Pirrone, Taho Dorta, Salvatore Cambria, Albert Marti, Karthikeyan Krishnamourthy, Jordi Madrenas
Neural Networks3
2016 Synfire Chain Emulation by Means of Flexible SNN Modeling on a SIMD Multicore Architecture
Mireya Zapata, Jordi Madrenas
ICANN (1)1
2016 Compact Associative Memory for AER Spike Decoding in FPGA-Based Evolvable SNN Emulation
Mireya Zapata, Jordi Madrenas
ICANN (1)1
2016 AER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation
Taho Dorta, Mireya Zapata, Jordi Madrenas, Giovanny Sánchez
Neurocomputing2