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N. T. Grisamore

dblp:185/3692 · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 1958
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Integrated circuit design · 62% Electronic design automation · 27% Memory systems · 10%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis
combinational logic synthesis
0.011958
Logical Design Using the Stroke Function · IRE Trans. Electron. Comput. 1958
Memory systems
delay-line memory
0.011956
Pulse Generator and High-Speed Memory Circuit · IRE Trans. Electron. Comput. 1956
Integrated circuit design
digital circuit design
0.021956
Pulse Generator and High-Speed Memory Circuit · IRE Trans. Electron. Comput. 1956
High-Speed Flip-Flops for the Millimicrosecond Region · IRE Trans. Electron. Comput. 1956
Integrated circuit design › digital circuit design › sequential circuit design
flip-flop
0.011956
High-Speed Flip-Flops for the Millimicrosecond Region · IRE Trans. Electron. Comput. 1956
Integrated circuit design › digital circuit design
high-speed digital circuits
0.011956
High-Speed Flip-Flops for the Millimicrosecond Region · IRE Trans. Electron. Comput. 1956
Electronic design automation
logic synthesis
0.011958
Logical Design Using the Stroke Function · IRE Trans. Electron. Comput. 1958
Integrated circuit design › digital circuit design
pulse generation
0.011956
Pulse Generator and High-Speed Memory Circuit · IRE Trans. Electron. Comput. 1956
Integrated circuit design › digital circuit design
switching circuits
0.011956
High-Speed Flip-Flops for the Millimicrosecond Region · IRE Trans. Electron. Comput. 1956
YearPublicationVenuePosition
1958 Logical Design Using the Stroke Function
N. T. Grisamore, Louis S. Rotolo, G. U. Uyehara
IRE Trans. Electron. Comput.1
1956 High-Speed Flip-Flops for the Millimicrosecond Region
abstract
The problem of designing high-speed flip-flops has been approached by dividing the circuit operation into steady-state and switching functions, the steady-state function being assigned to a slave flip-flop and the switching function to a driving circuit. Circuits, using conventional components and having a resolving time of 10mμsec, are described. Resolving times as low as 2mμsec have been attained by using a special beam-deflection tube as the slave flip-flop. These circuits dissipate considerably less power in the intervals between switching than conventional circuits.
Z. Bay, N. T. Grisamore
IRE Trans. Electron. Comput.2
1956 Pulse Generator and High-Speed Memory Circuit
abstract
Circuits for the recycling of pulses by means of a driving tube and an electromagnetic delay line have been developed, The necessary characteristic for the driving tube is shown and the effects of the delay line on the amplitude and width of pulses with respect to recycling operation are explained. Two modes of operation of these circuits are possible. One mode of operation allows any number of pulses in a recycling period, the number being limited only by the time space on the delay line. The other mode restricts the number of pulses in a recycling period to a particular value. Experimental circuits are shown which have been used as generators of pulses as short as 5 millimicroseconds at frequencies as high as 50 mc. Other circuits are shown which can be used as memory circuits for the storage of a number of these short pulses.
Z. Bay, N. T. Grisamore
IRE Trans. Electron. Comput.2