This paper proposes a direct RF baud clock recovery methodology for low-cost energy-efficient real-time demodulations. A baud clock phase-locked loop (PLL) is proposed to directly extract the baud clock from modulated millimeter-wave signals, which employs a type-I PLL incorporating a baud clock phase detector (BCPD). The BCPD uses a super-regenerative sample-and-hold amplifier (SR-SHA) as a RF sampler and extracts the phase misalignments based on DC components of mixing results between input signals and reconstructed samples. To verify the proposed methodology, a prototype of baud clock recovery circuit with a carrier frequency of 60 GHz was implemented in a 40-nm CMOS process. On-wafer measurement results show that the prototype achieves a baud clock recovery speed of 3.65 Gbaud with an RMS jitter below 0.02 unit interval, demonstrating the ability to provide baud clock recovery for BPSK to 1024-QAM demodulation with a low power consumption of 20.2 mW. By eliminating the needs of oversampling and complex digital signal processing in real-time communications, the proposed methodology provides an energy-efficient and low-cost baud clock recovery solution compared to DSP-based approaches.

Integrated sensing and communications (ISAC) as one of the key technologies is capable of supporting high-speed communication and high-precision sensing for the upcoming 6G. This paper studies a waveform strategy by designing the orthogonal frequency division multiplexing (OFDM)-based reference signal (RS) for sensing and communication in ISAC system. We derive the closed-form expressions of Cramér-Rao bound (CRB) for the distance and velocity estimations, and obtain the communication rate under the mean square error of channel estimation. Then, a weighted sum CRB minimization problem on the distance and velocity estimations is formulated by considering communication rate requirement and RS intervals constraints, which is a mixed-integer problem due to the discrete RS interval values. To solve this problem, some numerical methods are typically adopted to obtain the optimal solutions, whose computational complexity grow exponentially with the number of symbols and subcarriers of OFDM. Therefore, we propose a relaxation and approximation method to transform the original discrete problem into a continuous convex one and obtain the sub-optimal solutions. Finally, our proposed scheme is compared with the exhaustive search method in numerical simulations, which show slight gap between the obtained sub-optimal and optimal solutions, and this gap further decreases with large weight factor.

Super-regenerative receivers (SRRs) hold great promise as a low-cost solution for wireless communication due to their low power and relative simplicity. However, previous researches have primarily concentrated on super-regenerative amplifiers/oscillators, leading to limited insights into SRRs with inappropriate assumptions or dispensable operations, such as synchronous quench and baseband oversampling. This paper presents an improved general theory of super-regenerative reception in the linear mode that provides more design insights for digital communication. By analyzing the time-domain model of a general super-regenerative circuit, we derived a comprehensive frequency-domain model based on a convolution method, through which a concept of signal-lobe transfer function is introduced. Based on the proposed model, the effects of quench jitter and residual phenomenon are analyzed. Furthermore, an asynchronous quench method is introduced, which eliminates the requirement of synchronization between the modulated symbol and the quench signal, thus reducing the system complexity. To eliminate the baseband oversampling, especially for high-speed communications, main-lobe filtering and sub-sampling techniques are also proposed. To verify this general theory and proposed techniques, two SRRs with main-lobe filtering and sub-sampling were designed with ideal components and simulated using Cadence Virtuoso. The simulation results of two SRRs match with the proposed model very well. Overall, this paper provides a comprehensive analysis of super-regenerative reception for digital communication and offers valuable insights into its potentials and limitations.

This paper presents a 77GHz power amplifier (PA) in 40nm CMOS technology for automotive radars. A symmetrical current-mode power combiner is adopted in the PA design to extend bandwidth, enrich efficiency, and maximize output power. The small-signal gain of the PA is 16.4dB with a 3-dB bandwidth from 68 to 85GHz. The proposed PA achieves a saturated output power (Psat) of 17dBm, Psat-1dBbandwidth of 30GHz from 70-100GHz, and peak power-added efficiency (PAE) of 20%.