EDBT 2026 Demo / reviewers in the wild / expert
Ruilin Wu
dblp:186/0938
· DBLP profile ↗
7ranked-venue papers
0as first author
7since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 4 since 2021Applied, interdisciplinary, general and emerging computing · 2 · 2 since 2021Computer networks · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Here, There and Everywhere: The Past, the Present and the Future of Local Storage in Cloud
Leping Yang, Yanbo Zhou, Gong Zeng, Saisai Zhang, Ruilin Wu, Chaoyang Sun, Shiyi Luo, Keqiang Niu, Junping Wu, Jiaji Zhu, Jiesheng Wu, Mariusz Barczak, Wayne Gao, Ruiming Lu, Erci Xu, Guangtao Xue |
FAST | 6 |
| 2026 | Continuous Angular Power Spectrum Recovery from Channel Covariance via Chebyshev Polynomials
Shengsong Luo, Ruilin Wu, Chongbin Xu, Junjie Ma 0001, Xiaojun Yuan 0002, Xin Wang 0003 |
ICC | 2 |
| 2026 | Affine-Projection Recovery of Continuous Angular Power Spectrum: Geometry and ResolutionabstractThis paper considers recovering a continuous angular power spectrum (APS) from the channel covariance. Building on the projection-onto-linear-variety (PLV) algorithm, an affine-projection approach introduced by Miretti \emph{et. al.}, we analyze PLV in a well-defined \emph{weighted} Fourier-domain to emphasize its geometric interpretability. This yields an explicit fixed-dimensional trigonometric-polynomial representation and a closed-form solution via a positive-definite matrix, which directly implies uniqueness. We further establish an exact energy identity that yields the APS reconstruction error and leads to a sharp identifiability/resolution characterization: PLV achieves perfect recovery if and only if the ground-truth APS lies in the identified trigonometric-polynomial subspace; otherwise it returns the minimum-energy APS among all covariance-consistent spectra. Shengsong Luo, Ruilin Wu, Chongbin Xu, Junjie Ma 0001, Xiaojun Yuan 0002, Xin Wang 0003 |
ISIT | 2 |
| 2025 | SparseLUT: Sparse Connectivity Optimization for Lookup Table-Based Deep Neural NetworksabstractWe present SparseLUT, a novel training method for Lookup Table (LUT)-based Deep Neural Networks (DNNs) that eliminates the need for random seed optimization-a common requirement in existing LUT-DNN approaches (e.g., LogicNets, PolyLUT, PolyLUT-Add, and NeuraLUT) that rely on fixed sparsity masks. SparseLUT is a connectivity-centric training technique tailored for LUT-based DNNs, that leverages a non-greedy training strategy that prioritizes the pruning of less significant connections and strategically regrows alternative ones, resulting in efficient convergence to the target sparsity. Experimental results show consistent accuracy improvements across benchmarks, including up to a 2.13% increase on MNIST and a 0.94% improvement for Jet Substructure Classification compared to random sparsity. This is done without any hardware overhead and achieves state-of-the-art results for LUT-based DNNs (Code: https://github.com/bingleilou/SparseLUT). Binglei Lou, Ruilin Wu, Philip Leong |
FCCM | 2 |
| 2025 | AMD Versal Implementations of FAM and SSCA EstimatorsabstractCyclostationary analysis is widely used in signal processing, particularly in the analysis of human-made signals, and spectral correlation density (SCD) is often used to characterise cyclostationarity. Unfortunately, for real-time applications, even utilising the fast Fourier transform (FFT), the high computational complexity associated with estimating the SCD limits its applicability. In this work, we present optimised, high-speed fieldprogrammable gate array (FPGA) implementations of two SCD estimation techniques. Specifically, we present an implementation of the FFT accumulation method (FAM) running entirely on the AMD Versal AI engine (AIE) array. We also introduce an efficient implementation of the strip spectral correlation analyser (SSCA) that can be used for window sizes up to 220. For both techniques, a generalised methodology is presented to parallelise the computation while respecting memory size and data bandwidth constraints. Compared to an NVIDIA GeForce RTX 3090 graphics processing unit (GPU) which uses a similar 7 nm technology to our FPGA, for the same accuracy, our FAM/SSCA implementations achieve speedups of$4.43 \times / 1.90 \times$and a$30.5 \mathrm{x} / 24.5 \mathrm{x}$improvement in energy efficiency. Carol Jingyi Li, Ruilin Wu, Philip H. W. Leong |
FPL | 2 |
| 2025 | ShieldReduce: Fine-Grained Shielded Data Reduction
Jingyuan Yang 0018, Jun Wu 0001, Ruilin Wu, Jingwei Li 0001, Patrick P. C. Lee, Xiong Li 0002, Xiaosong Zhang 0001 |
USENIX ATC | 3 |
| 2023 | Prediction of LncRNA-Protein Interactions Based on Multi-kernel Fusion and Graph Auto-Encoders
Dongdong Mao, Ruilin Wu, Yankai Wu, Jinxuan Wang, Jijun Tang, Zhijun Liao |
ICIC (3) | 3 |