EDBT 2026 Demo / reviewers in the wild / expert
Graham P. Jones
dblp:186/2136
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 1997
0000-0002-8397-3486ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 83% Memory systems · 17% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems › cache › prefetching
data prefetching |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Processor architecture and microarchitecture › execution model
decoupled access/execute architecture |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Processor architecture and microarchitecture › latency hiding
decoupled architecture |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Processor architecture and microarchitecture
latency hiding |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Processor architecture and microarchitecture
out-of-order execution |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Processor architecture and microarchitecture
superscalar processor |
0.0 | 1 | 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine · MICRO 1997 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1997 | A Limitation Study into Access Decoupling
Graham P. Jones, Nigel P. Topham |
Euro-Par | 1 |
| 1997 | A Comparison of Data Prefetching on an Access Decoupled and Superscalar MachineabstractWe investigate the behavior of data prefetching on an access decoupled machine and a superscalar machine. We assess if there are benefits to using the decoupling paradigm given that an out-of-order (o-o-o) superscalar architecture could in principle prefetch to the same degree as an access decoupled machine. We have found that for large issue width the access decoupled machine can hide memory latency more effectively than a single instruction window o-o-o superscalar architecture. Our findings also demonstrate that an access decoupled machine offers the benefit of reducing the complexity of window issue logic. Graham P. Jones, Nigel P. Topham |
MICRO | 1 |