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Alejandro Villegas

dblp:187/3799 · DBLP profile ↗
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5ranked-venue papers
3as first author
0since 2021 · last 2019
0000-0002-0269-2640ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 54% GPUs and heterogeneous computing · 23% Memory systems · 23%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing
GPU programming
0.312018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory · IEEE Trans. Computers 2018
Memory systems › on-chip memory
scratchpad memory
0.312018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory · IEEE Trans. Computers 2018
Parallel and multicore computing
synchronization
0.312018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory · IEEE Trans. Computers 2018
Parallel and multicore computing
transactional memory
0.312018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory · IEEE Trans. Computers 2018
Parallel and multicore computing › synchronization
shared memory synchronization
0.112018
Lightweight Hardware Transactional Memory for GPU Scratchpad Memory · IEEE Trans. Computers 2018

Methods — techniques the papers use, named apart from their topics

simulation-based evaluation · 0.3conflict detection · 0.3
YearPublicationVenuePosition
2019 Accelerating time series motif discovery in the Intel Xeon Phi KNL processor
Ivan Fernandez, Alejandro Villegas, Eladio Gutiérrez, Oscar G. Plata
J. Supercomput.2
2019 Toward a software transactional memory for heterogeneous CPU-GPU processors
Alejandro Villegas, Angeles G. Navarro, Rafael Asenjo, Oscar G. Plata
J. Supercomput.1
2018 Lightweight Hardware Transactional Memory for GPU Scratchpad Memory
abstract
Graphics Processing Units (GPUs) have become the accelerator of choice for data-parallel applications, enabling the execution of thousands of threads in a Single Instruction - Multiple Thread (SIMT) fashion. Using OpenCL terminology, GPUs offer a global memory space shared by all the threads in the GPU, as well as a local memory space shared by only a subset of the threads. Programmers can use local memory as a scratchpad to improve the performance of their applications due to its lower latency as compared to global memory. In the SIMT execution model, data locking mechanisms used to protect shared data limit scalability. To take full advantage of the lower latency that local memory affords, and to provide an efficient synchronization mechanism, we propose GPU-LocalTM as a lightweight and efficient transactional memory (TM) for GPU local memory. To minimize the storage resources required for TM support, GPU-LocalTM allocates transactional metadata in the existing memory resources. Additionally, GPU-LocalTM implements different conflict detection mechanisms that can be used to match the characteristics of the application. For the workloads studied in our simulation-based evaluation, GPU-LocalTM provides from 1.1X up to 100X speedup over serialized critical sections.
Alejandro Villegas, Rafael Asenjo, Angeles G. Navarro, Oscar G. Plata, David R. Kaeli
IEEE Trans. Computers1
2017 Hardware Support for Scratchpad Memory Transactions on GPU Architectures
Alejandro Villegas, Rafael Asenjo, Angeles G. Navarro, Oscar G. Plata, Rafael Ubal, David R. Kaeli
Euro-Par1
2013 Optimal tilt and orientation maps: a multi-algorithm approach for heterogeneous multicore-GPU systems
Siham Tabik, Alejandro Villegas, Emilio L. Zapata, Luis F. Romero
J. Supercomput.2