Demo Data from EDBT 2026 / reviewers in the wild / expert
Jonathon Magaña
dblp:187/8231 · also Jonathon Crandall Magaña
· DBLP profile ↗
3ranked-venue papers
2as first author
0since 2021 · last 2018
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
1 paper |
Hardware security and side channels · 50% Privacy and data protection · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels
integrated circuit security |
0.3 | 1 | 2018 | Analysis of security of split manufacturing using machine learning · DAC 2018 |
Privacy and data protection › inference attack
neighborhood attack |
0.3 | 1 | 2018 | Analysis of security of split manufacturing using machine learning · DAC 2018 |
Electronic design automation
physical design |
0.1 | 1 | 2018 | Analysis of security of split manufacturing using machine learning · DAC 2018 |
Electronic design automation › physical design
VLSI layout |
0.1 | 1 | 2018 | Analysis of security of split manufacturing using machine learning · DAC 2018 |
Methods — techniques the papers use, named apart from their topics
machine learning · 0.7feature ranking · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | Analysis of security of split manufacturing using machine learningabstractThis work is the first to analyze the security of split manufacturing using machine learning, based on data collected from layouts provided by industry, with 8 routing metal layers, and significant variation in wire size and routing congestion across the layers. We consider many types of layout features for machine learning including those obtained from placement, routing, and cell sizes. For the top split layer, we demonstrate dramatically better results in proximity attack compared to a recent prior work. We analyze the ranking of the features used by machine learning and show the importance of how features vary when moving to the lower layers. Since the runtime of our basic machine learning becomes prohibitively large for lower layers, we propose novel techniques to make it scalable with little sacrifice in effectiveness of the attack. Boyu Zhang 0001, Jonathon Magaña, Azadeh Davoodi |
DAC | 2 |
| 2017 | Are Proximity Attacks a Threat to the Security of Split Manufacturing of Integrated Circuits?abstractSplit manufacturing is a technique that allows manufacturing the transistor-level and lower metal layers of an integrated circuit (IC) at a high-end, untrusted foundry, while manufacturing only the higher metal layers at a smaller, trusted foundry. Using split manufacturing is only viable if the untrusted foundry cannot reverse engineer the higher metal layer connections (and thus the overall IC design) from the lower layers. This paper studies the effectiveness of proximity attack as a key step to reverse engineer a design at the untrusted foundry. We propose and study different proximity attacks based on how a set of candidates are defined for each broken connection. The attacks use both placement and routing information along with factors which capture the router's behavior such as per-layer routing congestion. Our studies are based on designs having millions of nets routed across nine metal layers and significant layer-by-layer wire size variation. Our results show that a common, Hamming distance-based proximity attack seldom achieves a match rate over 5%. But our proposed attack yields a relatively small list of candidates which often contains the correct match. Finally, we propose a procedure to artificially insert routing blockages in a design at a desired split level, without causing any area overhead, in order to trick the router to make proximity-based reverse engineering significantly more challenging. Jonathon Magaña, Daohang Shi, Jackson Melchert, Azadeh Davoodi |
IEEE Trans. Very Large Scale Integr. Syst. | 1 |
| 2016 | Are proximity attacks a threat to the security of split manufacturing of integrated circuits?abstractSplit manufacturing is a technique that allows manufacturing the transistor-level and lower metal layers of an IC at a high-end, untrusted foundry, while manufacturing only the higher metal layers at a smaller, trusted foundry. Using split manufacturing is only viable if the untrusted foundry cannot reverse engineer the higher metal layer connections (and thus the overall IC design) from the lower layers. This work studies the effectiveness of proximity attack as a key step to reverse engineer a design at the untrusted foundry. We propose and study different proximity attacks based on how a set of candidates are defined for each broken connection. The attacks use both placement and routing information along with factors which capture the router's behavior such as per-layer routing congestion. Our studies are based on designs having millions of nets routed across 9 metal layers and significant layer-by-layer wire size variation. Our results show that a common, Hamming Distance-based proximity attack seldom achieves a match rate over 5%. But our proposed attack yields a relatively-small list of candidates which often contains the correct match. Finally, we propose a procedure to artificially insert routing blockages in a design at a desired split level, without causing any area overhead, in order to trick the router to make proximity-based reverse engineering significantly more challenging. Jonathon Magaña, Daohang Shi, Azadeh Davoodi |
ICCAD | 1 |