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Saul Amarel

dblp:19/2798 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 3 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 2 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Human-computer interaction and pervasive computing
1 paper
Design research and methods · 100%
Artificial intelligence
1 paper
Knowledge representation and reasoning · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 60% Electronic design automation · 40%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Medical and health informatics · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Knowledge, reasoning and agents › Knowledge representation and reasoning
model-based reasoning
0.011978
A Model-Based Method for Computer-Aided Medical Decision-Making · Artif. Intell. 1978
Medical and health informatics
clinical decision support
0.011978
A Model-Based Method for Computer-Aided Medical Decision-Making · Artif. Intell. 1978
Integrated circuit design
digital circuit design
0.011964
Majority Gate Networks · IEEE Trans. Electron. Comput. 1964
Electronic design automation
logic synthesis
0.011964
Majority Gate Networks · IEEE Trans. Electron. Comput. 1964
Integrated circuit design › digital circuit design › threshold logic
majority logic circuits
0.011964
Majority Gate Networks · IEEE Trans. Electron. Comput. 1964
Electronic design automation › logic synthesis › boolean function realization
symmetric function synthesis
0.011964
Majority Gate Networks · IEEE Trans. Electron. Comput. 1964
Integrated circuit design › digital circuit design › threshold logic
threshold logic circuits
0.011964
Majority Gate Networks · IEEE Trans. Electron. Comput. 1964

Methods — techniques the papers use, named apart from their topics

threshold function realization · 0.0array network synthesis · 0.0
YearPublicationVenuePosition
1991 AI and Design
Saul Amarel, Alvin M. Despain, H. Penny Nii, Louis I. Steinberg, Marty Tenenbaum, Peter M. Will
IJCAI1
1978 A Model-Based Method for Computer-Aided Medical Decision-Making
Sholom M. Weiss, Casimir A. Kulikowski, Saul Amarel, Aran Safir
Artif. Intell.3
1977 Applications of Artificial Intelligence
Saul Amarel, John Seely Brown, Bruce G. Buchanan, Peter E. Hart, Casimir A. Kulikowski, William A. Martin, Harry E. Pople
IJCAI1
1964 Majority Gate Networks
abstract
This paper presents methods for realizing simple threshold functions of n arguments by networks of k-input majority gates, where k≪n. An optimal network realization of the 5-argument majority function using 3-input majority gates is given, and it is then generalized by steps with realizations for the (2n-l)-argument majority function (where n = 3, 4, ...) using (2n-3)-input majority gates, and then for the (2n-1)-argument majority function using (2k-l)-input majority gates (where k≪n). In a final generalization an array network using (2k-l)-input majority gates introduced for the realization of an (m/n), ``simple,'' threshold function (where m = 1, 2, ...,n). The array network is then applied to the synthesis of arbitrary symmetric functions; in the latter synthesis a realization of ``adjustable logic'' is given where, by simple control of network connections, the same network can be made to compute any symmetric function. The specific networks for ``5 by 3's'' (5-argument majority function realized by a 3-input majority gate), ``7 by 5's'', and ``7 by 3's'' are the best known.
Saul Amarel, G. Cooke, Robert O. Winder
IEEE Trans. Electron. Comput.1