Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Yukio Miyazaki

dblp:19/3529 · DBLP profile ↗
← Back
3ranked-venue papers
2as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2 · 2 first-authorSystems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
2 papers
Empirical software engineering · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Empirical software engineering
software metrics
0.011987
Software Metrics Using Deviation Value · ICSE 1987
Empirical software engineering › software effort estimation
COCOMO
0.011985
COCOMO Evaluation and Tailoring · ICSE 1985
Empirical software engineering
software effort estimation
0.011985
COCOMO Evaluation and Tailoring · ICSE 1985

Methods — techniques the papers use, named apart from their topics

deviation value · 0.0COCOMO tailoring · 0.0
YearPublicationVenuePosition
1998 Design and Experimental Results of a 2V-Operation Single-Chip GaAs T/R-MMIC Front-End for 1.9-GHz Personal Communications
abstract
Design and experimental results of a 2-V operation single-chip GaAs T/R-MMIC front-end are described for 1.9-GHz personal communication terminals. This chip, fabricated with planar self-aligned gate FET process useful for low-cost and high-volume production, integrates RF front-end analog circuits-a power amplifier, a T/R-switch, and a low-noise amplifier. Additionally integrated are a newly designed voltage doubler-negative voltage generator (VDNVG) and a control logic circuit to control transmit and receive functions. The chip is capable of delivering 21-dBm output power at 39 % efficiency with 2-V single power supply in transmit mode. By utilizing up-voltage and negative voltages generated from the generator, the new interface circuit enables the switch to handle high power outputs over 24 dBm with 0.55-dB insertion loss.
Kazuya Yamamoto, Takao Moriwaki, Yutaka Yoshii, Takayuki Fujii, Jun Otsuji, Yoshinobu Sasaki, Yukio Miyazaki, Kazuo Nishitani
ASP-DAC7
1987 Software Metrics Using Deviation Value
Yukio Miyazaki, Noritoshi Murakami
ICSE1
1985 COCOMO Evaluation and Tailoring
Yukio Miyazaki, Kuniaki Mori
ICSE1