This paper addresses the problem of designing optimal distributed control in the changing electric energy systems. We aim to improve the aggregated reactive power inefficiency of inverter-controlled and power-coupled electrical systems. To achieve this, we formulate an optimal control problem aimed at optimizing reactive power and interface mismatch using the energy state space model. Despite the general complexity of solving an optimal control problem, we demonstrate that our proposed model in energy state space admits a linear optimality condition in the variational form. We demonstrate that this condition can be decomposed into local state variables and measurements from adjacent connected components, facilitating a distributed approach to optimal control design. The variables exchanged with the neighboring components are technology agnostic and can be interpreted as costate variables with intuitive physical meaning. We illustrate the conditions and results of the distributed optimal control using a small system with controllable source serving a time-varying power load. Additionally, we explore voltage regulation in the proposed control design, which can be implemented using fast switching power electronics.

The fast Fourier transform (FFT) is a fundamental kernel of many computation-intensive scientific applications. This paper deals with an implementation of the FFT on the accelerator system, a heterogeneous multicore architecture to accelerate computation-intensive parallel computing in scientific and engineering applications. The Engineering and Scientific Computation Accelerator (ESCA) consists of a control unit and a single instruction multiple data (SIMD) processing element (PE) array, in which PEs communicate with each other via a hierarchical two-level network-on-chip (NoC) with high bandwidth and low latency. We exploit the architecture features of ESCA to implement a parallel FFT algorithm efficiently. Experimental results show that both the proposed parallel FFT algorithm and the ESCA architecture are scalable. The 16-bit fixed-point parallel FFT performance of ESCA is compared with a published work to prove the superiority of the mapping algorithm and the hardware architecture. The floating-point parallel FFT performances of ESCA are evaluated and compared with those of the IBM Cell processor and GPU to demonstrate the computing power of the ESCA system for high performance applications.