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E. Fu

dblp:19/6378 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1997
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › memory management › virtual memory
address translation
0.011997
Efficient Hardware Hashing Functions for High Performance Computers · IEEE Trans. Computers 1997
Memory systems › memory management › virtual memory
page table
0.011997
Efficient Hardware Hashing Functions for High Performance Computers · IEEE Trans. Computers 1997
YearPublicationVenuePosition
1997 Efficient Hardware Hashing Functions for High Performance Computers
abstract
Hashing is critical for high performance computer architecture. Hashing is used extensively in hardware applications, such as page tables, for address translation. Bit extraction and exclusive ORing hashing "methods" are two commonly used hashing functions for hardware applications. There is no study of the performance of these functions and no mention anywhere of the practical performance of the hashing functions in comparison with the theoretical performance prediction of hashing schemes. In this paper, we show that, by choosing hashing functions at random from a particular class, called H/sub 3/, of hashing functions, the analytical performance of hashing can be achieved in practice on real-life data. Our results about the expected worst case performance of hashing are of special significance, as they provide evidence for earlier theoretical predictions.
M. V. Ramakrishna, E. Fu, E. Bahcekapili
IEEE Trans. Computers2