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Jeffrey Odom

dblp:19/6384 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2005
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 91% Memory systems · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › simulation
cache simulation
0.112005
Using Dynamic Tracing Sampling to Measure Long Running Programs · SC 2005
Performance modeling and evaluation
simulation
0.112005
Using Dynamic Tracing Sampling to Measure Long Running Programs · SC 2005
Performance modeling and evaluation
workload characterization
0.112005
Using Dynamic Tracing Sampling to Measure Long Running Programs · SC 2005
Memory systems
cache
0.012005
Using Dynamic Tracing Sampling to Measure Long Running Programs · SC 2005

Methods — techniques the papers use, named apart from their topics

dynamic tracing sampling · 0.1
YearPublicationVenuePosition
2005 Using Dynamic Tracing Sampling to Measure Long Running Programs
abstract
Detailed cache simulation can be useful to both system developers and application writers to understand an application’s performance. However, measuring long running programs can be extremely slow. In this paper we present a technique to use dynamic sampling of trace snippets throughout an application’s execution. We demonstrate that our approach improves accuracy compared to sampling a few timesteps at the beginning of execution by judiciously choosing the frequency, as well as the points in the control flow, at which samples are collected. Our approach is validated using the SIGMA tracing and simulation framework for the IBM Power family of processors.
Jeffrey Odom, Jeffrey K. Hollingsworth, Luiz De Rose, Kattamuri Ekanadham, Simone Sbaraglia
SC1