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Shraman Ray Chaudhuri

dblp:190/7370 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 87% GPUs and heterogeneous computing · 13%
Artificial intelligence
1 paper
Deep learning architectures and training · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Deep learning architectures and training › convolutional neural network › convolution design
3d convolution
0.312017
Deep Tensor Convolution on Multicores · ICML 2017
Machine learning › Deep learning architectures and training
convolutional neural network
0.312017
Deep Tensor Convolution on Multicores · ICML 2017
Processor architecture and microarchitecture
chip multiprocessor
0.312017
Deep Tensor Convolution on Multicores · ICML 2017
Processor architecture and microarchitecture
CPU optimization
0.312017
Deep Tensor Convolution on Multicores · ICML 2017
GPUs and heterogeneous computing
GPU computing
0.112017
Deep Tensor Convolution on Multicores · ICML 2017

Methods — techniques the papers use, named apart from their topics

winograd convolution · 0.6cache-aware tiling · 0.6AVX vectorization · 0.6
YearPublicationVenuePosition
2017 Deep Tensor Convolution on Multicores
abstract
Deep convolutional neural networks (ConvNets) of 3-dimensional kernels allow joint modeling of spatiotemporal features. These networks have improved performance of video and volumetric image analysis, but have been limited in size due to the low memory ceiling of GPU hardware. Existing CPU implementations overcome this constraint but are impractically slow. Here we extend and optimize the faster Winograd-class of convolutional algorithms to the $N$-dimensional case and specifically for CPU hardware. First, we remove the need to manually hand-craft algorithms by exploiting the relaxed constraints and cheap sparse access of CPU memory. Second, we maximize CPU utilization and multicore scalability by transforming data matrices to be cache-aware, integer multiples of AVX vector widths. Treating 2-dimensional ConvNets as a special (and the least beneficial) case of our approach, we demonstrate a 5 to 25-fold improvement in throughput compared to previous state-of-the-art.
David M. Budden, Alexander Matveev, Shibani Santurkar, Shraman Ray Chaudhuri, Nir Shavit
ICML4