EDBT 2026 Demo / reviewers in the wild / expert
Hang Yan 0003
dblp:192/1241-3
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2024
0000-0002-3386-8784ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Visualization and visual analytics · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Interconnection networks and networks-on-chip · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Visualization and visual analytics › scientific visualization
simulation visualization |
0.8 | 1 | 2024 | Visual Exploratory Analysis for Designing Large-Scale Network-on-Chip Architectures: A Domain Expert-Led Design Study · IEEE Trans. Vis. Comput. Graph. 2024 |
Visualization and visual analytics
visual analytics |
0.8 | 1 | 2024 | Visual Exploratory Analysis for Designing Large-Scale Network-on-Chip Architectures: A Domain Expert-Led Design Study · IEEE Trans. Vis. Comput. Graph. 2024 |
Interconnection networks and networks-on-chip
network-on-chip design |
0.2 | 1 | 2024 | Visual Exploratory Analysis for Designing Large-Scale Network-on-Chip Architectures: A Domain Expert-Led Design Study · IEEE Trans. Vis. Comput. Graph. 2024 |
Methods — techniques the papers use, named apart from their topics
user study · 1.5case study · 1.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Visual Exploratory Analysis for Designing Large-Scale Network-on-Chip Architectures: A Domain Expert-Led Design StudyabstractVisualization design studies bring together visualization researchers and domain experts to address yet unsolved data analysis challenges stemming from the needs of the domain experts. Typically, the visualization researchers lead the design study process and implementation of any visualization solutions. This setup leverages the visualization researchers' knowledge of methodology, design, and programming, but the availability to synchronize with the domain experts can hamper the design process. We consider an alternative setup where the domain experts take the lead in the design study, supported by the visualization experts. In this study, the domain experts are computer architecture experts who simulate and analyze novel computer chip designs. These chips rely on a Network-on-Chip (NOC) to connect components. The experts want to understand how the chip designs perform and what in the design led to their performance. To aid this analysis, we develop Vis4Mesh, a visualization system that provides spatial, temporal, and architectural context to simulated NOC behavior. Integration with an existing computer architecture visualization tool enables architects to perform deep-dives into specific architecture component behavior. We validate Vis4Mesh through a case study and a user study with computer architecture researchers. We reflect on our design and process, discussing advantages, disadvantages, and guidance for engaging in a domain expert-led design studies. Hang Yan 0003, Katherine E. Isaacs, Yifan Sun 0002 |
IEEE Trans. Vis. Comput. Graph. | 2 |