Recently, convolutional neural networks for finger vein recognition have gained attention, but their application in IoT smart home security is underexplored. Existing methods typically require networks to identify all categories in a dataset, leading to high parameter demands, which is inefficient given the small, dynamic user groups (3-5 users) in smart homes. To address this, we propose a finger vein recognition system based on meta-learning. Our approach frames recognition as a meta-learning task, introducing a dynamic, exponentially-weighted multistep loss optimization to enhance the model-agnostic meta-learning process. This allows quick adaptation to new tasks with minimal data. Additionally, we design an adaptive recognition scheme that updates network parameters without altering the structure for various users. Experiments on public datasets confirm the effectiveness of our system in IoT smart home security, achieving excellent recognition performance.

The development of machine learning has increasingly extended to edge mobile devices like Unmanned Aerial Vehicles (UAVs). It leads that the security of grouped Unmanned Aerial Vehicles (UAVs) data collection in harsh environment is also concerned. Deploying a storage system in the UAVs, called mobile grouped storage clusters, can effectively manage data while ensuring data reliability and security. Compared with replication storage systems, erasure-coded storage systems reduce storage overhead, but have high repair cost. Partial decoding repair method is an effective strategy to minimize cross-group repair traffic for erasure-coded storage systems. However, existing methods are not suitable for the mobile cluster with varying bandwidths, which can not minimize repair time. We propose FLARepair, a fast location-aware repair strategy, based on partial decoding and machine learning prediction technology, to minimize the repair time and cross-group repair traffic. It determines the reconstruction sets adaptively to minimize the cross-group repair traffic according to the location of surviving nodes. It also dynamically repairs each failed strip and finds the optimal middle partial decoding nodes of each failed strip to minimize repair time. FLARepair has minimal repair time compared to 2 exiting methods (CAR and ClusterSR) and the basic method (NonPD) via dynamic numerical and static local cluster simulations.

The per-instruction sensitivity analysis framework is developed to evaluate the resiliency of a program and identify the segments of the program needing protection. However, for multi-bit hardware faults, the per-instruction sensitivity analysis frameworks can cause large overhead for redundant analyses. In this paper, we propose a basic-block-level sensitivity analysis framework, Forseti, to reduce the analysis overhead in analyzing impacts of modern microprocessors' multi-bit faults on programs. We implement Forseti in LLVM and evaluate it with five typical workloads. Extensive experimental results show that Forseti can achieve more than 90% sensitivity classification accuracy and 6.16× speedup over instruction-level analysis.

Federated learning (FL) is a distributed deep learning method which enables multiple participants, such as mobile phones and IoT devices, to contribute a neural network model while their private training data remains in local devices. This distributed approach is promising in the edge computing system where have a large corpus of decentralized data and require high privacy. However, unlike the common training dataset, the data distribution of the edge computing system is imbalanced which will introduce biases in the model training and cause a decrease in accuracy of federated learning applications. In this paper, we demonstrate that the imbalanced distributed training data will cause accuracy degradation in FL. To counter this problem, we build a self-balancing federated learning framework call Astraea, which alleviates the imbalances by 1) Global data distribution based data augmentation, and 2) Mediator based multi-client rescheduling. The proposed framework relieves global imbalance by runtime data augmentation, and for averaging the local imbalance, it creates the mediator to reschedule the training of clients based on Kullback-Leibler divergence (KLD) of their data distribution. Compared with FedAvg, the state-of-the-art FL algorithm, Astraea shows +5.59% and +5.89% improvement of top-1 accuracy on the imbalanced EMNIST and imbalanced CINIC-10 datasets, respectively. Meanwhile, the communication traffic of Astraea can be 92% lower than that of FedAvg.

With the rapid growth of edge-cloud computing, emerging applications pose higher performance demand on the storage system for storing massive data that are generated from various sources. The multi-sourced data shows different properties in size, retention time, and read/write frequency. Hybrid storage system is promised to efficiently handle the data in edge-cloud computing environment satisfying different data demands. The key problem is how to place the data on the hybrid storage system according to the run-time status and the properties of both data and the storage systems. In this paper, we propose Archivist - a machine learning assisted data placement mechanism for hybrid storage systems to reduce file access latency. We first design a machine learning based approach for predicting the access patterns of the incoming data. Then, we present a data placement algorithm to optimize the data on the hybrid storage mediums by matching the properties of data and the features of storage mediums. Extensive experimental results show that Archivist can achieve up to 49% improvement of system performance for file accesses compared with baseline.

Checkpointing is a key enabler of hibernation, live migration and fault-tolerance for virtual machines (VMs) in mobile devices. However, checkpointing a VM is usually heavyweight: the VM's entire memory needs to be dumped to storage, which induces a significant amount of (slow) I/O operations, degrading system performance and user experience. In this paper, we propose FLIC, a fast and lightweight checkpointing machinery for virtualized mobile devices by taking advantages of recent byte-addressable, non-volatile memory (NVRAM). Instead of saving the VM's entire memory to storage, we store its working set pages in NVRAM, avoiding accessing slow flash memory (compared to server-grade SSDs). To further reduce the write activities to flash memory, we propose an energy-efficient data deduplication to eliminate redundant data in VM snapshot and save storage space. Experimental results based on an Exynos 5250 SoC show that our approach can effectively improve the performance of checkpointing in mobile virutalization and save energy.

With high-performance mobile processors and large main memory, smartphones are now integrated with more applications and richer functionality than ever. This poses larger memory and storage space demands, however, most mobile systems have limited memory space, which in turn affects user satisfaction. For example, application response time could become longer due to limited memory capacity. Swapping is an effective way to extend memory capacity, but often lead to poor performance in smartphones.

Mobile applications are becoming increasingly feature-rich and powerful, but also dependent on large main memories, which consume a large portion of system energy, especially for devices equipped with 4/6 GB DRAM. Swapping inactive DRAM pages to byte-addressable, non-volatile memory (NVRAM) is a promising solution to this problem. However, most NVRAMs have limited write endurance and the current victim pages selecting algorithm does not aware it. Therefore, to make it practical, the design of an NVRAM based swapping system must also consider endurance. In this paper, we target at prolonging the lifetime of NVRAM based swap area in mobile devices by reducing the write activities to NVRAM based swap area. Different from traditional wisdom, such as wear leveling and hot/cold data identification, we propose to build a system called nCode, which exploits the fact that code pages are easy to identify, read-only, and therefore a perfect candidate for swapping. Utilizing NVRAM's byte-addressability, we support execute-in-place (XIP) of the code pages in the swap area, without copying them back to DRAM based main memory. Experimental results based on the Google Nexus 5 smartphone show that nCode can effectively prolong the lifetime of NVRAM under various workloads.