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Mengshuo Wang

dblp:195/5437 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 2019
0000-0001-7128-4352ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-authorArtificial intelligence and machine learning · 1Databases, data management, data science and information retrieval · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 96% Performance modeling and evaluation · 4%
Databases, data mining, and information retrieval
1 paper
Data mining · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › design for manufacturability › design for yield
yield enhancement
0.622018
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018
Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits · DAC 2017
Data mining
feature engineering
0.412019
AutoCross: Automatic Feature Crossing for Tabular Data in Real-World Applications · KDD 2019
Electronic design automation
hardware verification and test
0.312018
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018
Electronic design automation
physical design
0.312018
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018
Electronic design automation › circuit analysis
statistical circuit analysis
0.312018
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018
Electronic design automation
yield analysis
0.312018
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018
Electronic design automation › analog circuit design automation
analog circuit yield optimization
0.312017
Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits · DAC 2017
Performance modeling and evaluation › statistical analysis
statistical modeling
0.112017
Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits · DAC 2017

Methods — techniques the papers use, named apart from their topics

bayesian optimization · 0.6multi-granularity discretization · 0.4mini-batch gradient descent · 0.4beam search · 0.4gaussian process regression · 0.3expected improvement acquisition · 0.3gaussian kernel density estimation · 0.3EM algorithm · 0.3
YearPublicationVenuePosition
2019 AutoCross: Automatic Feature Crossing for Tabular Data in Real-World Applications
abstract
Feature crossing captures interactions among categorical features and is useful to enhance learning from tabular data in real-world businesses. In this paper, we present AutoCross, an automatic feature crossing tool provided by 4Paradigm to its customers, ranging from banks, hospitals, to Internet corporations. By performing beam search in a tree-structured space, AutoCross enables efficient generation of high-order cross features, which is not yet visited by existing works. Additionally, we propose successive mini-batch gradient descent and multi-granularity discretization to further improve efficiency and effectiveness, while ensuring simplicity so that no machine learning expertise or tedious hyper-parameter tuning is required. Furthermore, the algorithms are designed to reduce the computational, transmitting, and storage costs involved in distributed computing. Experimental results on both benchmark and real-world business datasets demonstrate the effectiveness and efficiency of AutoCross. It is shown that AutoCross can significantly enhance the performance of both linear and deep models.
Yuanfei Luo, Mengshuo Wang, Quanming Yao, Wei-Wei Tu, Yuqiang Chen, Wenyuan Dai, Qiang Yang 0001
KDD2
2018 Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation
abstract
In this paper, a Bayesian optimization approach is proposed for yield optimization of analog and SRAM circuits. Gaussian process (GP) regression is employed to predict the yield over the design space with uncertainty information. An expected improvement acquisition function is constructed over the model and guides the optimization with a utility-based strategy. These techniques, as a whole, can significantly reduce the number of expensive yield estimations during the optimization procedure. Furthermore, the GP model encodes the observation uncertainties of noise-corrupted objectives, which enables an adaptive control over yield estimations. By ensuring high estimation accuracies for promising designs while tolerating higher variabilities for low-yield ones, the proposed method can significantly cut down the average computational cost of yield estimations without surrendering the accuracy of the final result. Experimental results show that, compared with the state-of-the-art yield optimization approaches, the proposed method can significantly reduce the number of circuit simulations without compromising optimization efficacy.
Mengshuo Wang, Wenlong Lv, Fan Yang 0001, Changhao Yan, Wei Cai 0003, Dian Zhou, Xuan Zeng 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2017 Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits
abstract
Conventional yield optimization approaches rely on accurate yield estimation for given design parameters, which would be computational intensive. In this paper, a novel Bayesian yield optimization approach is proposed for analog and SRAM circuits. An equivalent a problem is formulated via applying Bayes' theorem on the augmented yield problem. The yield optimization problem is converted to identifying the design parameters with maximal probability density conditioning on the event that the corresponding circuit is "pass". Gaussian kernel density estimation is employed to approximate the conditional probability, and a multi-start-point based EM-like algorithm is proposed to solve the equivalent problem efficiently Compared with the state-of-the-art yield optimization approaches, the proposed method can significantly reduce the number of circuit simulations with comparable optimization accuracy by avoiding repetitive yield estimations.
Mengshuo Wang, Fan Yang 0001, Changhao Yan, Xuan Zeng 0001, Xiangdong Hu
DAC1
2017 High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis
abstract
The failure rate of static RAM (SRAM) cells is restricted to be extremely low to ensure sufficient high yield for the entire chip. In addition, multiple performances of interest and influences from peripherals make SRAM failure rate estimation a high-dimensional multiple-failure-region problem. This paper proposes a new method featuring a multistart-point sequential quadratic programming (SQP) framework to extend minimized norm importance sampling (IS) to address this problem. Failure regions in the variation space are first found by the low-discrepancy sampling sequence. Afterward, start points are generated in all identified failure regions and local optimizations based on SQP are invoked from these start points searching for the optimal shift vectors (OSVs). Based on the OSVs, a Gaussian mixture distorted distribution is constructed for IS. To further reduce the computational cost of IS while fully considering the influence of increasing dimensionality, an adaptive model training framework is proposed to keep high efficiency for both low- and high-dimensional problems. The experimental results show that the proposed method can not only approximate failure rate with high accuracy and efficiency in low-dimensional cases but also keep these features in high-dimensional ones.
Mengshuo Wang, Changhao Yan, Xin Li 0001, Dian Zhou, Xuan Zeng 0001
IEEE Trans. Very Large Scale Integr. Syst.1