Demo Data from EDBT 2026 / reviewers in the wild / expert
Wenkai He
dblp:196/3615
· DBLP profile ↗
3ranked-venue papers
2as first author
3since 2021 · last 2025
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 2 · 1 first-author · 2 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 65% Electronic design automation · 35% |
Topics — the 2 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
superscalar processor |
0.9 | 1 | 2025 | Automated Superscalar Processor Design by Learning Data Dependencies · IJCAI 2025 |
Electronic design automation
hardware verification and test |
0.3 | 1 | 2025 | Automated Superscalar Processor Design by Learning Data Dependencies · IJCAI 2025 |
Methods — techniques the papers use, named apart from their topics
stateful binary speculation diagram · 0.9simulated annealing · 0.9BSD expansion · 0.9machine learning · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Automated Superscalar Processor Design by Learning Data DependenciesabstractAutomated processor design, which can significantly reduce human efforts and accelerate design cycles, has received considerable attention. While recent advancements have automatically designed single-cycle processors that execute one instruction per cycle, their performance cannot compete with modern superscalar processors that execute multiple instructions per cycle. Previous methods fail on superscalar processor design because they cannot address inter-instruction data dependencies, leading to inefficient sequential instruction execution. This paper proposes a novel approach to automatically designing superscalar processors using a hardware-friendly model called the Stateful Binary Speculation Diagram (State-BSD). We observe that processor parallelism can be enhanced through on-the-fly inter-instruction dependent data predictors, reusing the processor's internal states to learn the data dependency. To meet the challenge of both hardware-resource limitation and design functional correctness, State-BSD consists of two components: 1) a lightweight state-selector trained by simulated annealing method to detect the most reusable processor states and store them in a small buffer; and 2) a highly precise state-speculator trained by BSD expansion method to predict the inter-instruction dependent data using the selected states. It is the first work to achieve the automated superscalar processor design, i.e. QiMeng-CPU-v2, which improves the performance by about 380x than the state-of-the-art automated design and is comparable to human-designed superscalar processors such as ARM Cortex A53. Shuyao Cheng, Rui Zhang 0040, Wenkai He, Pengwei Jin, Chongxiao Li, Zidong Du, Xing Hu 0001, Yifan Hao 0001, Guanglin Xu, Yuanbo Wen 0001, Ling Li 0001, Qi Guo 0001, Yunji Chen |
IJCAI | 3 |
| 2024 | CHDNet: Enhanced Arbitrary Style Transfer via Condition Harmony DiffusionNetabstractArbitrary Style Transfer (AST) renders an image by adopting the style of any chosen artwork while preserving its content structure. Despite the widespread popularity of feedforward AST methods, they tend to merely optimize the statistical characteristics of images, leading to unnatural outputs and displeasing low-quality distortions. In contrast, diffusion models effectively address this issue by reconstructing the overall image. Unlike typical image generation tasks controlled by a single condition, style transfer demands the simultaneous consideration of multiple conditions. We propose Condition Harmony DiffusionNet (CHDNet), which distinguishes between style and content conditions, integrating them into harmonious conditions to collaboratively guide the generation process. We innovatively introduce a content aware attention, designed to extract semantic features of the content image across multiple dimensions, distinctly setting it apart from the style condition. Furthermore, we have improved the skip connections in the diffusion model, which introduces a slight increase in model complexity but results in a substantial improvement in the representation of fine details. Further refinements in the image sampling process empower us with great control over the stylization effect in the generated results. Our method successfully employs diffusion models via harmonious conditions to solve AST, achieving outstanding effects. Experiments demonstrate that our method achieves stateof-the-art arbitrary style transfer. Wenkai He, Jianhui Zhao 0001 |
IJCNN | 1 |
| 2023 | Chip design with machine learning: a survey from algorithm perspective
Wenkai He, Xiaqing Li, Xinkai Song, Yifan Hao 0001, Rui Zhang 0040, Zidong Du, Yunji Chen |
Sci. China Inf. Sci. | 1 |