As conventional computers based on von Neumann architecture approach their physical and performance limits, unconventional computing paradigms such as Cellular Neural Networks (CellNNs) have emerged as promising platforms for real-time, massively parallel analog computation. However, conventional analog CellNNs suffer from scalability and power constraints due to large cell hardware overhead. This work investigates the integration of memristor-based crossbar arrays into CellNN architectures to address these limitations by exploiting their analog tunability, high density, and low power operation. A 1-Transistor-1-Memristor (1T1R) crossbar is proposed for implementing the coupling weights defining the CellNN gene. Device nonlinearity, asymmetry and stochastic variability are incorporated using the physics-based JART VCM memristor model, enabling accurate mapping of target weights onto memristor conductances through numerical optimization and differential-pair encoding. Simulations of edge detection tasks confirm high functional accuracy and robustness, while Monte Carlo analysis reveals variability’s impact, underscoring the need for variability-aware design of reliable memristor-CNN hardware.

In this work, we introduce a high speed and area efficient Cellular Nonlinear Network (CNN) cell, featuring two circuit variants that utilize threshold switches. The threshold switch (TS) model employed represents a current-controlled nanoscale negative differential resistance (NDR) device which exhibits an S-shaped DC I-V curve as a fingerprint. The proposed cell can be considered as the dual of the standard isolated CNN cell where the bistable cell characteristics, originating from the N-shaped voltage-controlled resistor, is implemented through the S-shaped current-controlled TSs. Similarly, the dynamics induced by the parallel capacitor accompanying the nonlinear resistor in the standard cell version are implemented through the internal inductive dynamics of the TSs, resulting in area and speed efficiency. The proposed CNN cell employs a DC voltage source, two bias resistors and 2 TSs, and essentially, features a differential-mode operation which helps to endow it with a symmetric DC I-V characteristic, as is the case for the standard CNN cell. The differential-mode approach further introduces design flexibility as the cell DC I-V characteristic can be adjusted by tuning circuit parameters. We demonstrate the functionality of the proposed cell by implementing image processing tasks ranging from edge detection and thresholding to logic AND and OR operations.

The electrical engineering community, interested to develop bio-inspired circuits, approaching the efficiency of the neural networks, is searching passionately for accurate yet simple electronic neurons, or neuristors for short. In recent years, the advent of volatile memristor devices, typically referred to as threshold switches, which admit a negative differential resistance under suitable polarization, similarly as the sodium and potassium ion channels across neuronal axon membranes, has opened up new exciting opportunities in neuromorphic circuit design, enabling innovative analogue electronic cells, capable to reproduce closely the intricate dynamical behaviors of biological neurons without requiring a disproportionate use of resources. The study, presented in this manuscript, achieves an important milestone in this area of research, demonstrating, through a circuit design approach based upon concepts and techniques from Dynamical System Theory, how to leverage the rich dynamics of a threshold switch, capable to boost a periodic sine-wave current signal of infinitesimal amplitude, while acting as a source of local energy, when poised on a suitable bias point, lying along the negative differential resistance branch of the respective S-shaped DC current-voltage characteristic, to induce, one after the other, the three fundamental bifurcations, governing the evolution of an electrical voltage spike from birth to extinction via the All-to-None effect across a biological axon membrane under a reverse sweep in the net synaptic current, according to the fourth-order Hodgkin-Huxley neuron model, in a second-order three-element circuit of unprecedented simplicity, as the current, generated by a DC source, appearing in parallel to a linear capacitor as well as to the volatile locally-active memristor, is subject to a monotonic increase.

This manuscript sheds light into the fundamental importance of the Principles of Local Activity and Edge of Chaos for the future design of innovative circuits, which, employing biomimetic memristive devices, are ideally suited for the development of energy-efficient artificially-intelligent technical systems. The focus of the work is the design of a Second-Order Reactance-Less Oscillator, across which oscillations may develop if and only if at least one of its two different volatile thermally-activated memristor physical realizations is biased along a negative differential resistance branch of the respective DC locus, which turns it into a source of local energy. Very importantly, the proposed cell is first found to lock in the oscillatory mode out of a local Hopf Supercritical Bifurcation when its design parameters are chosen from the Edge of Chaos region, providing clear evidence for the high degree of excitability it acquires as a result.

Neuromorphic circuits using emerging memory technologies have recently gained popularity since they facilitate dense integration with reduced design complexity. In this work, we introduce a simplified modeling approach for the analysis of threshold switch (TS) based neuron circuits where, under given constraints, we represent the TS device as a nonlinear resistor in series with a parasitic inductor. As a result, we define the current of the TS as its state variable. In order to demonstrate the feasibility of the proposed approach, we analyze the conventional Leaky Integrate and Fire (LIF) neuron circuit along with two of its modified variants. We validate the accuracy of the provided analysis and key predictions through numerical simulation results. As a significant contribution, we demonstrate the effectiveness of the proposed method in modifying the nullclines of the TS based LIF neuron and qualitatively align them with the nullclines of a 2ndorder biologically plausible neuron model.

Realized memristors exhibit a unique phenomenon called the fading memory effect, where the memristor response to an AC signal is determined by its characteristics (waveform, amplitude, frequency, and DC offset) rather than the memristor initial conditions. Recently, a method for programming Hewlett Packard’s TaOxmemristor to a target state was proposed, involving configuring the DC offset of a high-frequency square-wave AC voltage input. This served as a basic application example that exploits fading memory in non-volatile memristors, but didn’t consider non-ideal effects. Here, we assess the method applicability in a HfOx-based VCM resistive switch from Forschungszentrum Julich incorporating a variability-aware physics-based model.

As demand grows for efficient, localized processing in edge and in-sensor computing, novel architectural approaches are essential to meet low-power, high-density requirements. Memristor Cellular Nonlinear Networks (M-CNNs) offer a promising path forward, leveraging the unique properties of memristors for adaptable and scalable computation. This paper presents a study of novel M-CNN cell configurations designed to enhance computational versatility and address operational challenges in M-CNN-based systems. By leveraging memristor technology within CNN cells, we propose three distinct configurations: (1) incorporating parallel and series resistive elements for refined control over cell dynamics, (2) introducing a fixed bias voltage to expand computational capabilities, and (3) integrating the Full-Range CNN (FR-CNN) model into M-CNNs for the first time. The proposed topologies are evaluated through dynamic route maps (DRM) and vector field analysis to systematically assess stability and performance across varying design parameters.

In this paper, the design of an isolated Memristor Cellular Nonlinear Network (CNN) cell with discrete electronic elements is presented. The proposed versatile circuit allows for adjustable cell dynamical characteristics, controlled by design parameters, while the discrete element approach enables simple on-board implementation without the need for large-scale integration, which is necessary for testing hardware with individual fabricated memristors. A voltage-mode approach, that makes use of the diversity of operational amplifiers, is preferred here over a current-mode one that necessitates a large number of individual transistors. The dynamical properties of the system are initially investigated through the calculation of equilibrium points and further illustrated applying the concept of State Dynamic Routes (SDRs) for the cell assuming that the memristor dynamics are much slower than the capacitor voltage dynamics. Moreover, the effect of design parameters on the cell dynamics is being investigated, showing how the scaling of the operating voltage, as well as a plethora of CNN variants -i.e., the Chua-Yang and Full Range models-, can be implemented within the same design. Finally, the nonlinear conductance properties of real memristor devices are incorporated into the study, demonstrating interesting bifurcation phenomena between the cell monostability and bistability for specific parameter values.

Biological synapses behave as dynamically-rich nonlinear elements, participating in complicated computing tasks through their adaptation due to external stimuli. Such adaptivity constitutes an intrinsic property of non-volatile memristor devices, which are also able to maintain their internal state, under zero input, enabling novel bio-inspired learning operations. In this work, a synaptic element based on a memristive bridge, containing two resistors and two memristors, is studied, aiming to investigate complex memristor-based topologies that may result in rich synaptic dynamics. The proposed memristive bridge allows the realization of both positive and negative synaptic weights, while an asymmetric tuning of a weight, stemming from memristor's features and bridge topology, is demonstrated. In particular, by properly selecting the memristor's position and polarity within the bridge, different tuning behaviors have been observed, showcasing versatile learning properties of the topology. Along with the synaptic weight tuning, the read overall process of the synaptic weight, necessary for inference operations, is also investigated. We explore the dynamics of the bridge via numerical simulations.

This paper presents an analytical investigation of the transient and steady-state response of non-volatile memristors to high frequency periodic inputs, using as a case study a$\textrm {TaO}_{\textrm {x}}$-based nano-scale memristor model derived at HP Labs. For the first time, we provide a mathematical proof for the fading memory phenomenon in memristors stimulated by periodic inputs in the high frequency limit. Specifically, we demonstrate that the steady-state response of a non-volatile memristor, exhibiting asymmetric switching kinetics with respect to the polarity of the input, depends only on the amplitude of the testing signal and not on the device initial conditions. Based on the results of our analyses, we provide an alternative method for tuning the memristor state by using high-frequency AC inputs, and introduce a new system-theoretic visualization tool, namely the input-referred High-Frequency Dynamic Route Map (HF-DRM), that allows the reproduction of the memristor time-response to any high-frequency periodic input from each admissible initial condition. The purely theoretical results introduced in this paper could inspire new approaches for modulating the memory states of practical non-volatile memristors.

We present a compact, continuous, and numerically stable version of a tantalum oxide (TaOx) memristor model which can be employed for robust and reliable simulations of large scale memristor based circuits. The original model contains a piecewise differentiable function in the memductance expression and discontinuous step functions in the state equation. Additionally, the original model does not set a proper upper bound for the state variable and may admit blowing up solutions due to an exponential power term, preventing the use of it for numerically reliable simulations. Considering these drawbacks, we modify the original model so as to i) simplify the memductance function while removing its piecewise differentiable nonlinearity, ii) include a proper window function for the ON state dynamics, which is missing in the original model, iii) modify and bound the exponential power term to prevent an uncontrollable blow-up of the solutions, and iv) apply a process called unification, allowing us to remove the step functions inherent in the model, which is a novelty in state-limited memristor models. We validate the accuracy of the proposed model via DC and transient simulations, dynamic route map analysis and a Spice implementation of an anti-series configuration, showing the applicability of the model.

This paper presents the analytical investigation of complex pattern formation in a Memristor Cellular Nonlinear Network (M-CNN) by applying the theory of local activity. The proposed M-CNN has the conventional two dimensional (2D) planar structure, where all the memristive cells are identical and resistively coupled to each other. The single cell is composed of a suitable combination of a DC voltage source, a bias resistor, a locally active NbOx memristor, and a capacitor. The locally active memristor has a simplified generic form, enhancing the simulation speed, and a functional AC equivalent circuit, facilitating further inspections. The stability analysis of the single cell is followed by the extraction of the parameters of the local activity, edge-of-chaos, and sharp-edge-of-chaos domains. Simulation results demonstrate that pattern formation can emerge in a dissipatively coupled M-CNN with locally active memristors.

This paper presents a circuit-theoretic analysis of a NbO2-Mott memristor fabricated at Hewlett-Packard Labs. It investigates mechanisms behind the origin of complexity based on local activity, which characterizes the behavior of this outstanding nanodevice. We propose an accurate, particularly simplified version of a recently introduced physical model suitable for large-scale circuit simulations. Following the concept of local activity, we then conduct a small-signal circuit-theoretic derivation of the impedance and associated small-signal equivalent circuit elements to analyze device stability and frequency response. Finally, our analysis reveals locally active operating regions, as well as regions where the device dynamics are positioned on the edge of chaos. The latter regions are crucial for designing bio-inspired computing systems.

The introduction of memcomputing memristors into the design of Cellular Nonlinear Networks (CNNs) allows to reduce the integrated circuit area typically allocated to each processing element in hardware realizations. Furthermore, the highly nonlinear dynamics of memristors enriches the multivariate signal processing capabilities of these cellular memprocessing structures. This is demonstrated in this paper, where the standard and generalized Dynamic Route Map analysis tools are employed to elucidate the mechanisms by which a Memristor CNN with bistable-like and analog dynamic nonvolatile memristors executes fundamental image processing operations, respectively.

In this paper, we propose a new model for practical, nano-scale, NbO2-based Mott memristors, which is based on a thorough analysis performed on a recently presented physics-based model for these devices. Our investigations revealed that the 3D Poole-Frenkel conduction mechanism adopted in the aforementioned model, can be well-approximated by a transport equation in which: a) memristor current is expressed as a linear function of memristor voltage and b) the device memductance is solely dependent on the device temperature which represents the memristor state. The resulting simplified mathematical form of the original differential algebraic equation set is not only more suitable for simulating large-scale, nano-scale NbO2-based memristor circuits, but is also ideal for circuit-theoretic investigations which may allow an in depth understanding of the peculiar nonlinear behaviors of these devices.

In this paper we propose a new mem-computing image processing architecture, called Memristor Cellular Nonlinear Network, which leverages the unique capability of nonvolatile memristors to compute and store data in the same physical nano-scale locations. Adopting a bistable-like memristor in place for the linear resistor in the standard realization of a cell of the nonlinear dynamic array, the resulting network is capable to process information by exploiting the time evolution of the voltages across the memristors as well as to store/retrieve results into/ from the memristances. This attractive feature, absent in a standard Cellular Nonlinear Network, may pave the way towards the future development of a new generation of visual processors with unprecedented spatial resolution.

The translation of emerging application concepts that exploit resistive random access memory (ReRAM) into large-scale practical systems requires realistic yet computationally efficient device models. Here, we present a ReRAM model, where device current-voltage characteristics and resistive switching rate are expressed as a function of: 1) bias voltage and 2) initial resistive state (RS). The model versatility is validated on detailed characterization data, for both filamentary valence change memory and nonfilamentary ReRAM technologies, where device resistance is swept across its operating range using multiple input voltage levels. Furthermore, the proposed model embodies a window function which features a simple mathematical form analytically describing RS response under constant bias voltage as extracted from physical device response data. Its Verilog-A implementation captures the ReRAM memory effect without requiring integration of the model state variable, making it suitable for fast and/or large-scale simulations and overall interoperable with current design tools.

We demonstrate a desktop platform which has the ability of modeling ReRAM TiO2samples in a highly automated manner. The system consists of a bespoke RRAM characterization instrument that hosts packaged RRAM devices and is operated via a PC. The system's python-based software includes a module that automatically applies strategically chosen sequences of pulses to a test device and then extracts the suitable parameter values for a resistive switching model from the elicited response.

Analysis of the operation of CMOS gates is a complicated procedure. These gates can be replaced by equivalent inverters and therefore the expressions for the inverters are used to determine the electrical characteristics of the gates. In this paper, the equivalent inverter approach for replacing CMOS gates is evaluated. The NAND gate is used for this evaluation. Parametric expressions are created to determine the transistors widths of the equivalent inverter. A systematic method is used for incorporating the parameter dependencies in the expressions. Results verify the accuracy of this approach.