Mutation testing, a well-suited technology for functional validation, is regrettably poorly studied in hardware. We propose Mantra: the first open-source code-level mutation testing tool based on real hardware bugs. Specifically, Mantra devises time-aware mutation killing mechanism for cost reduction of hardware mutation testing using the parallelism of hardware design code, and then defines and implements 19 hardware mutation operators via large-scale empirical analysis on real bugs. Finally, the evaluation on public datasets from CirFix and OpenCores shows that Mantra achieves promising results with a maximum boost of 83.44%.

Verification of hardware design code is crucial for the quality assurance of hardware products. As an indispensable part of verification, localizing faults in the hardware design code is significant for hardware development but is often regarded as a notoriously difficult and time-consuming task. Thus, automated fault localization techniques that could assist manual debugging have attracted much attention in the hardware community. Prior work indicates that existing methods neither fully utilize program dynamic execution information nor lack attention to timing. In this work, we propose Tarsel: a time-aware spectrum-based fault localization approach to help bridge this gap. Tarsel integrates hardware-specific timing information with the program spectrum and captures the changes of executed statements when the state of the hardware program changes to effectively locate faults. The experimental results show that Tarsel successfully locates over half of bugs in the benchmark at Top-3 and about 90% of bugs at Top-5. In addition, Tarsel statistically outperforms the state-of-the-art fault localization approach CirFix under all six typical metrics. In particular, while no bugs are ranked at Top-1 by CirFix, Tarsel successfully locates 11.41% of bugs at Top-1. It brings fresh insights of hardware bug localization to the community.

Traditional methods include iterative compilation can make the compilation optimization sequence selection process automatically, and execute as many different versions of the program as possible within the allowed time and space. However, this method is a mechanical search. It lacks the use of previously acquired experience and requires larger implementation overhead. Therefore, there is a need for a compilation optimization method that can automatically predict the reliability of the target program after transformation without actually running the program. This paper proposes a method for compilation optimization sequence generation: ROPO (reliability oriented phase ordering) ANN. This method extracts program features based on the LLVM compilation framework and searches the compilation optimization space to find the best compilation optimization sequence for the current program version. The experimental results show that when comparing ROPOANN with existing iterative compilation methods and the non-iterative generation algorithms, the reliability improvement has also been greatly improved.

Modern compilers provide a huge number of optional compilation optimization options. Not only the selection of compilation optimization options represents a hard problem to be solved, but also the ordering of the phases is adding further complexity, making it a long standing problem in compilation research. A large number of experiments have shown that different ordering of the phases has varying degrees of influence on the program. Currently, most research focuses on the traditional optimization goals, such as execution speedup and code size optimization. In this paper, we focus on the impact of the phase-ordering on program reliability. We propose a new model with reinforcement learning algorithm A3C for finding the phase order that can improve the reliability of the program. We performed our experiments with LLVM compiler framework, considering 130 LLVM optimization options. The experimental results show that when compared with LLVM standard options and the existing phase-ordering method with genetic algorithm, the phase order found by our model can bring higher reliability gain to the program.

Modern compilers provide a huge number of optional compilation optimization options. It is necessary to select the appropriate compilation optimization options for different programs or applications. To mitigate this problem, machine learning is widely used as an efficient technology. How to ensure the integrity and effectiveness of program information is the key to problem mitigation. In addition, when selecting the best compilation optimization option, the optimization goals are often execution speed, code size, and CPU consumption. There is not much research on program reliability. This paper proposes a Gate Graph Attention Neural Network (GGANN)-based compilation optimization option selection model. The data flow and function-call information are integrated into the abstract syntax tree as the program graph-based features. We extend the deep neural network based on GGANN and build a learning model that learns the heuristics method for program reliability. The experiment is performed under the Clang compiler framework. Compared with the traditional machine learning method, our model improves the average accuracy by 5–11% in the optimization option selection for program reliability. At the same time, experiments show that our model has strong scalability.

Due to continuous improvements in the VLSI technologies, the dependability of computing, caused by soft errors, has become increasingly a design challenge. Current protection techniques usually incur significant economic costs, performance degradation or resource consumption. This paper introduces a lightweight software approach for mitigating soft errors. By exploiting the facts that many data values have narrow width or constant bits, indicating that a large fraction of binary bits are unused or constant, we can predict these data values before program execution. First of all, invariants concerning bit-level data widths and values are identified by performing two bitwise data-flow analyses. Based on the bitwise analysis results, the masking operations are inserted to clear the possible errors in the known-value bits for reducing the window of vulnerability. Then the program reliability is improved with minimum penalty. To improve the effectiveness, the covered mask analysis can remove the non-vital masking operations without affecting the dependability. We have implemented our approach in the LLVM compiler. The fault injection experimental results for the MiBench benchmarks indicate that our approach improves the reliability of programs by 8.03% while incurring only 1.61% performance overhead.