Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Ahmed H. M. O. Abulila

dblp:199/7219 · DBLP profile ↗
← Back
3ranked-venue papers
2as first author
1since 2021 · last 2022
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 1 since 2021Software engineering, systems software and programming languages · 2 · 2 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Storage systems · 54% Memory systems · 27% Energy-efficient computing · 16%

Topics — the 9 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
crash consistency
0.722022
ASAP: architecture support for asynchronous persistence · ISCA 2022
FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy · ASPLOS 2019
Memory systems › non-volatile memory
persistent memory
0.612022
ASAP: architecture support for asynchronous persistence · ISCA 2022
Storage systems › logging
write-ahead logging
0.612022
ASAP: architecture support for asynchronous persistence · ISCA 2022
Storage systems
flash and SSD
0.412019
FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy · ASPLOS 2019
Energy-efficient computing
power management
0.312017
NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture · HPCA 2017
Energy-efficient computing › power management › device power management
processor power management
0.312017
NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture · HPCA 2017
Storage systems › storage reliability
durability
0.212022
ASAP: architecture support for asynchronous persistence · ISCA 2022
Storage systems
storage reliability
0.112019
FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy · ASPLOS 2019
Cloud and datacenter computing › cloud service management
service level agreement
0.112017
NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture · HPCA 2017

Methods — techniques the papers use, named apart from their topics

hardware write-ahead logging · 0.6virtual memory management · 0.4page promotion · 0.4
YearPublicationVenuePosition
2022 ASAP: architecture support for asynchronous persistence
abstract
Supporting atomic durability of updates for persistent memories is typically achieved with Write-Ahead Logging (WAL). WAL flushes log entries to persistent memory before making the actual data persistent to ensure that a consistent state can be recovered if a crash occurs. Performing WAL in hardware is attractive because it makes most aspects of log management transparent to software, and it completes log persist operations (LPOs) and data persist operations (DPOs) in the background, overlapping them with the execution of other instructions.
Ahmed H. M. O. Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim
ISCA1
2019 FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy
abstract
Using flash-based solid state drives (SSDs) as main memory has been proposed as a practical solution towards scaling memory capacity for data-intensive applications. However, almost all existing approaches rely on the paging mechanism to move data between SSDs and host DRAM. This inevitably incurs significant performance overhead and extra I/O traffic. Thanks to the byte-addressability supported by the PCIe interconnect and the internal memory in SSD controllers, it is feasible to access SSDs in both byte and block granularity today. Exploiting the benefits of SSD's byte-accessibility in today's memory-storage hierarchy is, however, challenging as it lacks systems support and abstractions for programs. In this paper, we present FlatFlash, an optimized unified memory-storage hierarchy, to efficiently use byte-addressable SSD as part of the main memory. We extend the virtual memory management to provide a unified memory interface so that programs can access data across SSD and DRAM in byte granularity seamlessly. We propose a lightweight, adaptive page promotion mechanism between SSD and DRAM to gain benefits from both the byte-addressable large SSD and fast DRAM concurrently and transparently, while avoiding unnecessary page movements. Furthermore, we propose an abstraction of byte-granular data persistence to exploit the persistence nature of SSDs, upon which we rethink the design primitives of crash consistency of several representative software systems that require data persistence, such as file systems and databases. Our evaluation with a variety of applications demonstrates that, compared to the current unified memory-storage systems, FlatFlash improves the performance for memory-intensive applications by up to 2.3x, reduces the tail latency for latency-critical applications by up to 2.8x, scales the throughput for transactional database by up to 3.0x, and decreases the meta-data persistence overhead for file systems by up to 18.9x. FlatFlash also improves the cost-effectiveness by up to 3.8x compared to DRAM-only systems, while enhancing the SSD lifetime significantly.
Ahmed H. M. O. Abulila, Vikram S. Mailthody, Zaid Qureshi, Jian Huang 0006, Nam Sung Kim, Jinjun Xiong, Wen-Mei W. Hwu
ASPLOS1
2017 NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture
abstract
The rate of network packets encapsulating requests from clients can significantly affect the utilization, and thus performance and sleep states of processors in servers deploying a power management policy. To improve energy efficiency, servers may adopt an aggressive power management policy that frequently transitions a processor to a low-performance or sleep state at a low utilization. However, such servers may not respond to a sudden increase in the rate of requests from clients early enough due to a considerable performance penalty of transitioning a processor from a sleep or low-performance state to a high-performance state. This in turn entails violations of a service level agreement (SLA), discourages server operators from deploying an aggressive power management policy, and thus wastes energy during low-utilization periods. For both fast response time and high energy-efficiency, we propose NCAP, Network-driven, packet Context-Aware Power management for client-server architecture. NCAP enhances a network interface card (NIC) and its driver such that it can examine received and transmitted network packets, determine the rate of network packets containing latency-critical requests, and proactively transition a processor to an appropriate performance or sleep state. To demonstrate the efficacy, we evaluate on-line data-intensive (OLDI) applications and show that a server deploying NCAP consumes 37~61% lower processor energy than a baseline server while satisfying a given SLA at various load levels.
Mohammad Alian, Ahmed H. M. O. Abulila, Lokesh Jindal, Daehoon Kim 0001, Nam Sung Kim
HPCA2