Emmanuel Spyridakis

dblp:20/1338 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 80% High-performance computing · 20%
Computer networks
1 paper
Routing and switching · 100%

Topics — the 5 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › switch architecture
ATM switch
0.011998
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch · HPCA 1998
Interconnection networks and networks-on-chip › flow control
backpressure
0.011998
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch · HPCA 1998
Interconnection networks and networks-on-chip › flow control
credit-based flow control
0.011998
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch · HPCA 1998
Interconnection networks and networks-on-chip
multiprocessor interconnection
0.011998
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch · HPCA 1998
High-performance computing › cluster computing
network of workstations
0.011998
Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch · HPCA 1998

Methods — techniques the papers use, named apart from their topics

simulation · 0.0quantum flow control · 0.0credit flow control · 0.0
YearPublicationVenuePosition
1998 Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch
abstract
Multiprocessing (MP) on networks of workstations (NOW) is a high-performance computing architecture of growing importance. In traditional MP's, wormhole routing interconnection networks use fixed-size flits and backpressure. In NOW's, ATM-one of the major contending interconnection technologies-uses fixed-size cells, while backpressure can be added to it. We argue that ATM with backpressure has interesting similarities with wormhole routing. We are implementing ATLAS I, a single-chip gigabit ATM switch, which includes credit flow control (backpressure), according to a protocol resembling Quantum Flow Control (QFC). We show by simulation that this protocol performs better than the traditional multi-lane wormhole protocol: high throughput and low latency are provided with less buffer space. Also, ATLAS I demonstrates little sensitivity to bursty traffic, and, unlike wormhole, it is fair in terms of latency in hot-spot configurations. We use detailed switch models, operating at clock-cycle granularity.
Manolis Katevenis, Dimitrios Serpanos, Emmanuel Spyridakis
HPCA3