This paper develops a theoretical framework for the design of Active Split-Ring Resonators (ASRRs). An ASRR is a Split-Ring Resonator (SRR) equipped with a tunable negative resistor, enabling both switchability and quality factor boosting and tuning. These properties make ASRRs well-suited for integration into dense arrays on silicon chips, where pixelated near-fields are generated and leveraged for high-resolution 2D imaging of samples. Such imagers pave the way for real-time, non-invasive, and low-cost imaging of human body tissue. The paper investigates ASRR coupling to host transmission lines, nonlinear effects, signal flow, and the influence of various noise sources on detection performance. Verified through simulations, these studies provide design guidelines for optimizing the Signal-to-Noise Ratio (SNR) and power consumption of a single pixel, while adhering to the constraints of a scalable array.

OsciBear is a system-on-chip (SoC) featuring a RISC-V 32-bit 5-stage in-order scalar processor, AES accelerator, BLE 1M baseband-modem, and a 2.4 GHz radio front end (RFE) transceiver. It was designed in TSMC's 28nm process with a total die area of 1 mm2during the course of a 14-week semester by 18 students - 4 Ph.D students, 6 masters students, and 8 undergraduates - enrolled in UC Berkeley's special topics course “28nm SoC for loT” in Spring 2021. Additionally, a PCB was designed with off-chip reference clocks, bring-up tooling, as well as power amplifiers, RF switch, and an antenna to complete the radio front-end. The CPU has been demonstrated to run up to 30 MHz in typical operating conditions. The BLE 1M-compliant PHY layer packet assembly and disassembly has been verified in-hardware through “loopback” testing. Adherence to BLE's PHY FM specifications has also been verified with a commercial BLE receiver. In total, the chip consumes 8.43 mW of static power.

This article introduces a cascaded sliding-block decision feedback equalizer (SB-DFE) that equalizes multiple precursor and postcursor intersymbol interference (ISI). The paper also presents an enhanced statistical analysis for the DFE in the presence of residual ISI and additive white Gaussian noise (AWGN), along with generalized expressions for the probability and expected length of DFE burst errors. In addition, the statistical analysis is extended to the conventional SB-DFE and our proposed cascaded SB-DFE to accurately estimate their equalization capability, latency, and steady-state bit error rate (BER). The simulation results reveal that the cascaded SB-DFE provides as low BER as the mininum mean-squared error - DFE (MMSE-DFE) with substantially lower latency and hardware overhead.

This article revisits the concept of “noise measure” and its importance in designing high-frequency low-noise amplifiers. A new derivation is offered which is simpler than the original derivation of Haus and Adler. Several examples are used to calculate the minimum noise measure of a CMOS amplifier. It is also shown that “noise cancellation” techniques cannot improve the minimum noise measure.

The Internet-of-Things (IoT) promises one trillion wireless sensors in the next 10 to 15 years. To enable this scale, we present the experimental results on the time-keeping ability of crystal-free radios to lower the cost of the wireless sensors. We propose a network referenced frequency lock loop and demonstrate a one sigma mean frequency accuracy of 47 p/min, post calibration. We also extend this concept to calibrate the on-chip RF local oscillator by exploiting the network time synchronization for frequency calibration. This timing accuracy is sufficient to create a scalable wireless mesh network up to 10 hops deep with a 1 ms guard time interval. The impact of time synchronization on the average power consumption of the wireless sensor node is negligible and especially true for environments with mobility and high data traffic. We envision these emerging microsystems to be embedded into everyday objects and discuss the tradeoff of mobility with the average power consumption.

Ring oscillators have area and power advantages over LC tanks, but conventional wisdom is that rings must be locked to a high-Q external reference to be useful in RF communications. In this paper we explore performance of a 2.4GHz receiver incorporating only a free-running ring as a local oscillator. Using a simple technique to compensate for frequency error, we find that a minimum-size ring fabricated in 65nm CMOS and consuming only 105μW is able to demodulate 75% of received 802.15.4 packets and, if the FSK tone deviation is doubled from 802.15.4 spec, packet receive rate exceeds 99.8%.

Many-element antenna arrays, used for multi-user MIMO, are expected to be one of the cornerstone technologies for 5G wireless systems. Large arrays also offer the opportunity to average out some of the transceivers' analog imperfections, potentially enabling a lower-power implementation. In this paper we study the effect of local oscillator phase noise on beamforming MU-MIMO-OFDM systems. We show that the array does average out uncorrelated phase noise at each element. Exploiting this, we propose scaling the per-element phase noise specification proportionally to the array size, thereby maintaining constant array-level performance with lower power consumption. However, if the phase noise is entirely uncorrelated, this scaling causes a substantial degradation in the recovered signal energy. If, instead, some correlated low-frequency phase noise is introduced at each element, we show that phase noise scaling incurs no performance loss. In fact, under these conditions, a single, global pilot tracking loop can replace carrier recovery at each element. Additionally, this level of phase noise correlation eliminates the phase noise-induced channel aging effect. This type of correlation can be achieved by distributing a common reference and optimizing the bandwidth of the PLL.

Large arrays of radios have been exploited for beamforming and null steering in both radar and communication applications, but cost and form factor limitations have precluded their use in commercial systems. This paper discusses how to build arrays that enable multiuser massive multiple-input-multiple-output (MIMO) and aggressive spatial multiplexing with many users sharing the same spectrum. The focus of the paper is the energy- and cost-efficient realization of these arrays in order to enable new applications. Distributed algorithms for beamforming are proposed, and the optimum array size is considered as a function of the performance of the receiver, transmitter, frequency synthesizer, and signal distribution within the array. The effects of errors such as phase noise and synchronization skew across the array are analyzed. The paper discusses both RF frequencies below 10 GHz, where fully digital techniques are preferred, and operation at millimeter (mm)-wave bands where a combination of digital and analog techniques are needed to keep cost and power low.

A novel highly-efficient multi-band multi-mode all digital quadrature transmitter is presented. The all digital transmitter uses in-phase (I) codeword and quadrature (Q) codeword to control a switching-mode power amplifier (PA) or digital PA (DPA) consisting of in-phase PA (I-PA) and quadrature PA (Q-PA), where each of the power cells inside I-PA or Q-PA is either on or off. Due to the load interaction between I-PA and Q-PA, a 2-dimensional digital pre-distortion is applied to linearize DPA. The total transmitter is implemented in 40nm CMOS LP process and occupies a die area of 0.7mm2. The digital quadrature transmitter can support 20MHz, 40MHz, and 80MHz WiFi signals, Band 38 and Band 40 LTE signals with class 3 output power, and Bluetooth BDR, EDR2, and EDR3 signals.

A 4× oversampling 18thorder digital FIR filter suitable to replace all analog baseband filters in a mobile high-data-rate wireless communication transmitter is presented. Special architecture optimizations allow an estimated output sampling rate of 10Gs/s in 65nm CMOS while respecting full spectrum mask specifications of the ECMA & IEEE standards over the radio band of 8 GHz.

In ultra-wideband (UWB) systems, antennas act as filters that introduce a frequency dependent response from the transmitter to receiver. To capture the waveform dispersion so that one can equalize/compensate at the transmitter/receiver, a new circuit modeling methodology that handles omnidirectional small antennas is proposed. By transforming the antennas into the degenerated Foster canonical forms and utilizing the waveform-omnidirectional property, it is shown that the transmitted far field waveform is a scaled version of the voltage across the radiation resistor in the model. Extended Thevenin/Norton equivalent circuits with dependent sources tracking the frequency dependence of the antenna effective length are also built for UWB receiving antennas. Simulation and experimental results show that this methodology is effective over a wide bandwidth and suitable for modeling most UWB antennas.

With semiconductor technology feature size scaling below 100 nm, mixed-signal design faces some important challenges, caused among others by reduced supply voltages, process variation, and declining intrinsic device gains. Addressing these challenges requires innovative solutions, at the technology, circuit, architecture, and design-methodology level. We present some of these solutions, including a structured platform-based design methodology to enable a meaningful exploration of the broad design space and to classify potential solutions in terms of the relevant metrics.

The Green function over a multilayer substrate is derived by solving Poisson's equation analytically in the coordinate and numerically in the z and y coordinates. The x and y functional dependence is transformed into a discrete cosine transform (DCT) representation for rapid evaluation. The Green function is further transformed into a numerically stable form appropriate for finite-precision machine evaluation. This Green function is used to solve for the impedance matrix for an arbitrary three-dimensional arrangement of conductors placed anywhere in the substrate. Using this technique, the substrate coupling and loss in IC circuits can be analyzed. A spiral inductor is presented as an example. Experimental measurement results verify the accuracy of the technique.