Odd graphs are analyzed to determine their suitable in designing interconnection networks. These networks are shown to possess many features that make them competitive with other architectures, such as ring, star, mesh, the binary n-cube and its generalized form, the chordal ring, and flip-trees. Among the features are small internode distances, a lighter density, simplicity in implementing various self-routing algorithms (both for faulty and nonfaulty networks), capability of maximal fault tolerance, strong resilience, and good persistence. The routing algorithms (both for the faulty and fault-free networks) do not require any table lookup mechanism, and intermediate nodes do not need to modify the message. These graphs are shown to have a partitioning property that is based on Hadamard matrices and can be effectively used for a system's expansion and self-diagnostics.>

This paper proposes an architecture for accomplishing transport protocol processing at Gbps rates. The limitations of currently used transport protocols have been analyzed extensively in recent literature. Several benchmark studies have established the achievable throughput of ISO TP4 and TCP to be in the low Mbps range; several new protocols and implementation techniques have been proposed to achieve 100 Mbps and higher throughput rates. We briefly review some of these protocols and establish the need for a radically different approach to meet our objective. An estimate of the aggregate processing power required for Gbps throughput is developed. It is proposed that a cost effective and practical solution to the processing requirements could be based on a multi-processor system. The opportunities for parallel processing in a typical transport protocol are examined. Several alternate parallel processing approaches are examined and arguments are advanced for selecting a favored approach. A corresponding parallel processing architecture is described. Data structures used to preserve packet ordering and techniques for reducing contention in a multi-processing environment are discussed. An implementation methodology for conventional transport protocols (e.g. TP4) is outlined. Some suggestions are made for improving efficiency by making modifications to the protocol that do not compromise functionality. The performance achievable with this modified architecture is analyzed and some suggestions for further work are presented.

A highly versatile communication architecture, the bisectional interconnection network, is proposed. These networks possess many attractive features such as small internode distances, ability to do self-routing which is easily extendible to failure conditions, and the capability of maximal fault tolerance. The proposed architecture allows optimal implementation of various logical configurations. Furthermore, the authors propose the use of a combinatorial structure, called the symmetric balanced incomplete block design (SBIBD), to partition these networks. This important property of partitioning allows the system's expansion with fault tolerance and is utilized to describe two semidistributed fault-diagnostic strategies which require remarkably low overhead and at the same time identify a large number of faulty nodes. Furthermore, based on SBIBDs, a unique approach for making the diagnostic scheme itself fault tolerant is proposed.>

The preliminary hardware description of CHOPP (Columbia Homogeneous Parallel Processor), a MIMD machine supporting a fully distributed host-less operating system is presented. The architecture is intended to permit implementation of machines with 105 to 106 processors. Issues of interconnection networks, throughput, and memory structure are treated.

In the above-mentioned review1of Sayers' book2I commented favorably n Chapters 6-9 and the Appendixes but found the first 5 chapters unsatisfactory. I have since learned that Chapters 6-9 and the Appendixes are essentially word for word copies of two reports prepared for the Air Force by the Comtre Corporation. In the preface to Operating Systems Survey there is indeed an acknowledgment of the role of these Comtre studies as a basis for the book. However, there is nowhere an acknowledgment of the actual authors of these two reports.

This book is intended as a textbook for an introductory course in computer organization for undergraduates at universities and junior colleges. Its aims are given by the following sentences in the preface.

This book represents an interesting attempt to take an overall view of a data system defined by the author as "the artifact that consists of a digital computer, a control program, and an accessible library of programs and data." His intended audience are professionals in the computer industry whose pursuit of specialized vocations leads them away from systematic consideration of the data system as a whole. His avowed aim is "crispness in style and frugality in detail." Consequently this book covers a good deal of ground—sometimes very briefly.

A system design is given for a computer capable of direct execution of FORTRAN language source statements. The allowed types of statements are the FORTRAN DO, GO TO, computed GO TO, Arithmetic, READ, PRINT, arithmetic IF, CONTINUE, PAUSE, DIMENSION and END statements. Up to two subscripts are allowed for variables and no FORMAT statement is needed. The programmer's source program is converted to a slightly modified form while being loaded and placed in a Program Area in lower memory. His original variable names and statement numbers are retained in a Symbol Table in upper memory, which also serves as the data storage area. During execution of the program each FORTRAN statement is read and interpreted at basic circuit speeds since the machine is a hardware interpreter for these statements. The machine corresponds therefore to a ``one-pass, load-and-go'' compiler except, of course, that there is no translation to a different machine language. It is estimated that the control circuitry for this machine will require on the order of 10,000 diodes and 100 flip-flops. This does not include arithmetic circuitry.

One component of a computer for direct execution of an algebraic language is a circuit which translates algebraic statements into control signals to activate appropriate data access, storage and arithmetic cycles. The state diagram for a simplified version of such a circuit is given and explained. A modification of the Mealy sequential circuit model is utilized to develop a circuit design technique which is simple to use even for circuits with large numbers of states. This technique is demonstrated by design of the algebraic translator circuit, which has 11 states, 5 inputs and 15 outputs.

Programs to detect errors in digital computer operation have been written to serve as a maintenance tool or as part of a machine acceptance procedure. However, the detection of an error is only the beginning of any maintenance or repair procedure; it is also necessary that the error be diagnosed (located). This paper describes in some detail a program which detects and logs machine errors and then transfers to a diagnostic section to locate the error. A sample of the diagnostic program is given to illustrate the technique that is used.

article Free Access Share on A ``Curve Plotting'' Routine for the Inverse Laplace Transform of Rational Functions Author: T. R. Bashkow Bell Telephone Laboratories, Inc., Murray Hill, N. J. Bell Telephone Laboratories, Inc., Murray Hill, N. J.View Profile Authors Info & Claims Journal of the ACMVolume 5Issue 1Jan. 1958 pp 52–56https://doi.org/10.1145/320911.320918Published:01 January 1958Publication History 0citation347DownloadsMetricsTotal Citations0Total Downloads347Last 12 Months6Last 6 weeks3 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my Alerts New Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF