In this paper, we describe TSOtool, a program to check the behavior of the memory subsystem in a shared memory multiprocessor. TSOtool runs pseudo-randomly generated programs with data races on a system compliant with the total store order (TSO) memory consistency model; it then checks the results of the program against the formal TSO specification. Such analysis can expose subtle memory errors like data corruption, atomicity violation and illegal instruction ordering. While verifying TSO compliance completely is an NP-complete problem, we describe a new polynomial time algorithm which is incorporated in TSOtool. In spite of being incomplete, it has been successful in detecting several bugs in the design of commercial microprocessors and systems, during both pre-silicon and post-silicon phases of validation.

Article Transistor level placement for full custom datapath cell design Share on Authors: Durgam Vahia Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MAView Profile , Maciej Ciesielski Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MAView Profile Authors Info & Claims ISPD '99: Proceedings of the 1999 international symposium on Physical designApril 1999 Pages 158–163https://doi.org/10.1145/299996.300049Online:12 April 1999Publication History 8citation270DownloadsMetricsTotal Citations8Total Downloads270Last 12 Months0Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access