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George Papen

dblp:20/8397 · also George C. Papen · DBLP profile ↗
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13ranked-venue papers
0as first author
3since 2021 · last 2024
0000-0001-6727-1292ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 9 · 2 since 2021Systems, architecture and hardware · 2 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
9 papers
Optical networks · 37% Datacenter networks · 25% Software-defined and programmable networks · 24%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 77% Hardware accelerators and domain-specific architectures · 23%

Topics — the 11 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Optical networks › optical switching
optical circuit switching
2.062024
Realizing RotorNet: Toward Practical Microsecond Scale Optical Networking · SIGCOMM 2024
Lightwave Fabrics: At-Scale Optical Circuit Switching for Datacenter and Machine Learning Systems · SIGCOMM 2023
RotorNet: A Scalable, Low-complexity, Optical Datacenter Network · SIGCOMM 2017
Datacenter networks
optical datacenter network
1.032024
Lightwave Fabrics: At-Scale Optical Circuit Switching for Datacenter and Machine Learning Systems · SIGCOMM 2023
Realizing RotorNet: Toward Practical Microsecond Scale Optical Networking · SIGCOMM 2024
RotorNet: A Scalable, Low-complexity, Optical Datacenter Network · SIGCOMM 2017
Software-defined and programmable networks › programmable data plane
packet processing pipeline
0.712023
Rosebud: Making FPGA-Accelerated Middlebox Development More Pleasant · ASPLOS (3) 2023
Software-defined and programmable networks
programmable data plane
0.712023
Rosebud: Making FPGA-Accelerated Middlebox Development More Pleasant · ASPLOS (3) 2023
Transport protocols and congestion control › TCP performance
TCP throughput
0.212024
Realizing RotorNet: Toward Practical Microsecond Scale Optical Networking · SIGCOMM 2024
Routing and switching › switching
hybrid switching
0.212015
Scheduling techniques for hybrid circuit/packet networks · CoNEXT 2015
Optical networks
wavelength-division multiplexing
0.212023
Lightwave Fabrics: At-Scale Optical Circuit Switching for Datacenter and Machine Learning Systems · SIGCOMM 2023
Hardware accelerators and domain-specific architectures
hardware-software interface
0.212023
Rosebud: Making FPGA-Accelerated Middlebox Development More Pleasant · ASPLOS (3) 2023
Routing and switching
circuit switching
0.212014
Circuit Switching Under the Radar with REACToR · NSDI 2014
Routing and switching › switching
hybrid circuit/packet switching
0.212014
Circuit Switching Under the Radar with REACToR · NSDI 2014
Software-defined and programmable networks
control plane
0.122017
RotorNet: A Scalable, Low-complexity, Optical Datacenter Network · SIGCOMM 2017
Integrating microsecond circuit switching into the data center · SIGCOMM 2013

Methods — techniques the papers use, named apart from their topics

standardized interface · 1.3hardware/software decoupling · 1.3prototype deployment · 0.8measurement · 0.8hardware-software co-design · 0.7prototype implementation · 0.3scheduling algorithm design · 0.2optical circuit switching · 0.2optical switching · 0.2control plane design · 0.2
YearPublicationVenuePosition
2024 Realizing RotorNet: Toward Practical Microsecond Scale Optical Networking
abstract
We describe our experience building and deploying a demand-oblivious optically-switched network based on the RotorNet and Opera architectures. We detail the design, manufacture, deployment, and end-to-end operation of a 128-port optical rotor switch along with supporting NIC hardware and host software. Using this prototype, we assess yield, synchronization, and interoperability with commodity hardware and software at a scale of practical relevance. We provide the first real-world measurements of Linux TCP throughput and host-to-host latency in an operational RotorNet, achieving 98% of link rate with 99th-percentile ping times faster than commodity packet-switching hardware. In the process, we uncover unexpected challenges with link-level dropouts and devise a novel and flexible way to address them. Our deployment experience demonstrates the feasibility of our implementation approach and identifies opportunities for future exploration.
William M. Mellette, Alex Forencich, Rukshani Athapathu, Alex C. Snoeren, George Papen, George Porter
SIGCOMM5
2023 Rosebud: Making FPGA-Accelerated Middlebox Development More Pleasant
abstract
We introduce an approach to designing FPGA-accelerated middleboxes that simplifies development, debugging, and performance tuning by decoupling the tasks of hardware-accelerator implementation and software-application programming. Rosebud is a framework that links hardware accelerators to a high-performance packet processing pipeline through a standardized hardware/software interface. This separation of concerns allows hardware developers to focus on optimizing custom accelerators while freeing software programmers to reuse, configure, and debug accelerators in a fashion akin to software libraries. We show the benefits of the Rosebud framework by building a firewall based on a large blacklist and porting the Pigasus IDS pattern-matching accelerator in less than a month. Our experiments demonstrate that Rosebud delivers high performance, serving ∼200 ‍Gbps of traffic while adding only 0.7–7 microseconds of latency.
Moein Khazraee, Alex Forencich, George Papen, Alex C. Snoeren, Aaron Schulman
ASPLOS (3)3
2023 Lightwave Fabrics: At-Scale Optical Circuit Switching for Datacenter and Machine Learning Systems
abstract
We describe our experience developing what we believe to be the world's first large-scale production deployments of lightwave fabrics used for both datacenter networking and machine-learning (ML) applications. Using optical circuit switches (OCSes) and optical transceivers developed in-house, we employ hardware and software codesign to integrate the fabrics into our network and computing infrastructure. Key to our design is a high degree of multiplexing enabled by new kinds of wavelength-division-multiplexing (WDM) and optical circulators that support high-bandwidth bidirectional traffic on a single strand of optical fiber. The development of the requisite OCS and optical transceiver technologies leads to a synchronous lightwave fabric that is reconfigurable, low latency, rate agnostic, and highly available. These fabrics have provided substantial benefits for long-lived traffic patterns in our datacenter networks and predictable traffic patterns in tightly-coupled machine learning clusters. We report results for a large-scale ML superpod with 4096 tensor processing unit (TPU) V4 chips that has more than one ExaFLOP of computing power. For this use case, the deployment of a lightwave fabric provides up to 3× better system availability and model-dependent performance improvements of up to 3.3× compared to a static fabric, despite constituting less than 6% of the total system cost.
Ryohei Urata, Kevin Yasumura, Roy Bannon, Jill Berger, Pedram Dashti, Norman P. Jouppi, Cedric F. Lam, Sheng Li 0007, Erji Mao, Daniel Nelson, George Papen, Muhammad Mukarram Bin Tariq, Amin Vahdat
SIGCOMM13
2020 Corundum: An Open-Source 100-Gbps Nic
abstract
Corundum is an open-source, FPGA-based prototyping platform for network interface development at up to 100 Gbps and beyond. The Corundum platform includes several core features to enable real-time, high-line-rate operations including: a high-performance datapath, 10G/25G/100G Ethernet MACs, PCI Express gen 3, a custom PCIe DMA engine, and native high-precision IEEE 1588 PTP timestamping. A key feature is extensible queue management that can support over 10,000 queues coupled with extensible transmit schedulers, enabling fine-grained hardware control of packet transmission. In conjunction with multiple network interfaces, multiple ports per interface, and per-port event-driven transmit scheduling, these features enable the development of advanced network interfaces, architectures, and protocols. The software interface to these hardware features is a high-performance driver for the Linux networking stack. The platform also supports scatter/gather DMA, checksum offloading, receive flow hashing, and receive-side scaling. Development and debugging is facilitated by a comprehensive open-source, Python-based simulation framework that includes the entire system from a simulation model of the driver and PCI express interface to the Ethernet interfaces. The power and flexibility of Corundum is demonstrated by the implementation of a microsecond-precision time-division multiple access (TDMA) hardware scheduler to enforce a TDMA schedule at 100 Gbps line rate with no CPU overhead.
Alex Forencich, Alex C. Snoeren, George Porter, George Papen
FCCM4
2017 RotorNet: A Scalable, Low-complexity, Optical Datacenter Network
abstract
The ever-increasing bandwidth requirements of modern datacenters have led researchers to propose networks based upon optical circuit switches, but these proposals face significant deployment challenges. In particular, previous proposals dynamically configure circuit switches in response to changes in workload, requiring network-wide demand estimation, centralized circuit assignment, and tight time synchronization between various network elements--- resulting in a complex and unwieldy control plane. Moreover, limitations in the technologies underlying the individual circuit switches restrict both the rate at which they can be reconfigured and the scale of the network that can be constructed.
William M. Mellette, Rob McGuinness, Alex Forencich, George Papen, Alex C. Snoeren, George Porter
SIGCOMM5
2015 Scheduling techniques for hybrid circuit/packet networks
abstract
A range of new datacenter switch designs combine wireless or optical circuit technologies with electrical packet switching to deliver higher performance at lower cost than traditional packet-switched networks. These "hybrid" networks schedule large traffic demands via a high-rate circuits and remaining traffic with a lower-rate, traditional packet-switches. Achieving high utilization requires an efficient scheduling algorithm that can compute proper circuit configurations and balance traffic across the switches. Recent proposals, however, provide no such algorithm and rely on an omniscient oracle to compute optimal switch configurations.
Matthew K. Mukerjee, Conglong Li, Nicolas Feltman, George Papen, Stefan Savage, Srinivasan Seshan, Geoffrey M. Voelker, David G. Andersen, Michael Kaminsky, George Porter, Alex C. Snoeren
CoNEXT5
2015 RoXOR: Re-thinking retransmissions in WiFi
abstract
It is widely believed that future small-cell unmanaged wireless networks will be dominated by interference caused by packet collisions and not by signal-to-noise issues. In such a network, a large fraction of the collisions are caused by hidden terminals. Here we present the design and evaluation of RoXOR, a system that can effectively combat random collisions caused by bursty traffic from hidden terminals. RoXOR relies on jointly using both the amount of redundancy and the structure of the redundancy, as expressed by a code. Using these degrees of freedom, we design and experimentally evaluate an iterative rateless code that with high probability achieves better performance as compared to methods such as ZigZag. The mean improvement, as measured by the per packet delay, is 12-18% for values typically used for a 802.11× protocol.
Patrick Ling, George Papen, Tara Javidi
PIMRC2
2014 Circuit Switching Under the Radar with REACToR
Alex Forencich, Rishi Kapoor, Malveeka Tewari, Geoffrey M. Voelker, George Papen, Alex C. Snoeren, George Porter
NSDI7
2013 Integrating microsecond circuit switching into the data center
abstract
Recent proposals have employed optical circuit switching (OCS) to reduce the cost of data center networks. However, the relatively slow switching times (10--100 ms) assumed by these approaches, and the accompanying latencies of their control planes, has limited its use to only the largest data center networks with highly aggregated and constrained workloads. As faster switch technologies become available, designing a control plane capable of supporting them becomes a key challenge.
George Porter, Richard D. Strong, Nathan Farrington, Alex Forencich, Pang-Chen Sun, Tajana Rosing, Yeshaiahu Fainman, George Papen, Amin Vahdat
SIGCOMM8
2012 Hunting mice with microsecond circuit switches
abstract
Recently, there have been proposals for constructing hybrid data center networks combining electronic packet switching with either wireless or optical circuit switching, which are ideally suited for supporting bulk traffic. Previous work has relied on a technique called hotspot scheduling, in which the traffic matrix is measured, hotspots identified, and circuits established to automatically offload traffic from the packet-switched network. While this hybrid approach does reduce CAPEX and OPEX, it still relies on having a well-provisioned packet-switched network to carry the remaining traffic. In this paper, we describe a generalization of hotspot scheduling, called traffic matrix scheduling, where most or even all bulk traffic is routed over circuits. In other words, we don't just hunt elephants, we also hunt mice. Traffic matrix scheduling rapidly time-shares circuits across many destinations at microsecond time scales. The traffic matrix scheduling algorithm can route arbitrary traffic patterns and runs in polynomial time. We briefly describe a working implementation of traffic matrix scheduling using a custom-built data center optical circuit switch with a 2.8 microsecond switching time.
Nathan Farrington, George Porter, Yeshaiahu Fainman, George Papen, Amin Vahdat
HotNets4
2012 A demonstration of ultra-low-latency data center optical circuit switching
abstract
We designed and constructed a 24x24-port optical circuit switch (OCS) prototype with a programming time of 68.5 μs, a switching time of 2.8 μs, and a receiver electronics initialization time of 8.7 μs [1]. We demonstrate the operation of this prototype switch in a data center testbed under various workloads.
Nathan Farrington, George Porter, Pang-Chen Sun, Alex Forencich, Joseph E. Ford, Yeshaiahu Fainman, George Papen, Amin Vahdat
SIGCOMM7
2010 Helios: a hybrid electrical/optical switch architecture for modular data centers
abstract
The basic building block of ever larger data centers has shifted from a rack to a modular container with hundreds or even thousands of servers. Delivering scalable bandwidth among such containers is a challenge. A number of recent efforts promise full bisection bandwidth between all servers, though with significant cost, complexity, and power consumption. We present Helios, a hybrid electrical/optical switch architecture that can deliver significant reductions in the number of switching elements, cabling, cost, and power consumption relative to recently proposed data center network architectures. We explore architectural trade offs and challenges associated with realizing these benefits through the evaluation of a fully functional Helios prototype.
Nathan Farrington, George Porter, Sivasankar Radhakrishnan, Hamid Hajabdolali Bazzaz, Vikram Subramanya, Yeshaiahu Fainman, George Papen, Amin Vahdat
SIGCOMM7
1998 Computing two-dimensional unambiguous horizontal wavenumber spectra from OH airglow images
abstract
There is an inherent 180/spl deg/ ambiguity in the derived wave-propagation direction when using conventional spectral-analysis techniques on OH-imager observations. A processing technique for computing the unambiguous two-dimensional (2D) horizontal wavenumber spectrum from images of gravity wave perturbations in OH emission intensities is presented. The technique involves computing the (w, k,l)=(w, h, /spl phi/) spectrum of OH images collected over a several-hour period, where k is the zonal wavenumber, l is the meridional wavenumber, h=(k/sup 2/+ l/sup 2/)/sup 1/2/, /spl phi/=tan/sup -1/ (k/l), and w is the temporal frequency. Before computing the spectra, the all-sky images are processed by first flat fielding each image, then removing stars by using a median filter, subtracting an estimate of the background continuum, and finally computing the relative OH intensity perturbations. Each pixel is then mapped onto a 256/spl times/256 rectilinear grid of geographic coordinates by using a 9/spl times/9 Hamming-weighted sinc-interpolation function. The interpolated image is restricted to the 600/spl times/600-km/sup 2/ region centered at zenith so that the resulting horizontal resolution is 2.34 km. Spatial and temporal prewhitening is employed prior to computing spectra to minimize artifacts in the derived unambiguous spectrum. The authors illustrate the method with a real sequence of images acquired on February 3, 1995, at the Starfire Optical Range (SOR), near Albuquerque, NM. The predominant direction of wave propagation is determined and the k, l, h, and /spl phi/ spectra presented.
Mark R. Coble, George Papen, Chester S. Gardner
IEEE Trans. Geosci. Remote. Sens.2