Demo Data from EDBT 2026 / reviewers in the wild / expert
Thomas W. Sigmon
dblp:20/879
· DBLP profile ↗
3ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Electronic design automation · 65% Integrated circuit design · 35% |
Topics — the 9 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 1 | 1989 | A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Integrated circuit design › analog and mixed-signal circuits
device modeling |
0.0 | 1 | 1989 | A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Electronic design automation › technology computer-aided design › process simulation
ion implantation modeling |
0.0 | 1 | 1989 | SUPREM 3.5-process modeling of GaAs integrated circuit technology · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Electronic design automation › technology computer-aided design
process modeling |
0.0 | 1 | 1989 | A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Electronic design automation › technology computer-aided design
process modeling and simulation |
0.0 | 1 | 1989 | SUPREM 3.5-process modeling of GaAs integrated circuit technology · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Electronic design automation › technology computer-aided design › process simulation
dopant diffusion modeling |
0.0 | 1 | 1988 | Numerical simulation of the gas immersion laser doping (GILD) process in silicon · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Electronic design automation › technology computer-aided design
process simulation |
0.0 | 1 | 1988 | Numerical simulation of the gas immersion laser doping (GILD) process in silicon · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Integrated circuit design
gaas integrated circuits |
0.0 | 1 | 1989 | SUPREM 3.5-process modeling of GaAs integrated circuit technology · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Integrated circuit design › radio-frequency circuit design
microwave integrated circuits |
0.0 | 1 | 1989 | A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989 |
Methods — techniques the papers use, named apart from their topics
ion implantation modeling · 0.0i-v curve fitting · 0.0empirical parameter fitting · 0.0analytical device modeling · 0.0Pearson IV distribution · 0.0numerical simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1989 | A process and device model for GaAs MESFET technology: GATESabstractA combined process and device modeling program for GaAs MESFET digital and microwave integrated-circuit technology is described. GATES (for GaAs transistor engineering models) is designed to meet the needs of process, test, and manufacturing engineers who require answers to questions about how process parameters and tolerances affect device performance and uniformity, but who have limited access to large-computer modeling tools. The program makes extensive use of analytical models. The physical models used for ion implantation, dopant diffusion and other process factors and the methods used to calculate carrier profiles, threshold voltages, layer resistivities. MESFET parasitic resistances, and I-V characteristics are discussed. The I-V curves can be fitted to expressions suitable for use in circuit optimization codes such as SPICE. It is shown how to calibrate some of the physical quantities.> Robert Anholt, Thomas W. Sigmon |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1989 | SUPREM 3.5-process modeling of GaAs integrated circuit technologyabstractA computer program SUPREM 3.5, has been developed to simulate processes used to manufacture ion-implanted GaAs integrated circuits. The processes modelled in the present version of the simulator include ion implantation, diffusion, and activation. The simulator includes a routine to calculate the threshold voltage of a MESFET device based on the simulated processing results and on substrate properties. The models used for each dopant and process are based on physical mechanisms when possible, but empirical parameter fitting is sometimes used. Pearson IV distributions are used for the implantation modeling, concentration-independent diffusivities are used for n-type dopants, concentration-dependent diffusivities are used for p-type dopants, and concentration-dependent activation efficiencies are used for all dopants. The simulator models each process individually, as well as integrating the various processes and models together.> Michael D. Deal, S. E. Hansen, Thomas W. Sigmon |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 1988 | Numerical simulation of the gas immersion laser doping (GILD) process in siliconabstractA simulation program that models the gas immersion laser doping (GILD) process is described. This program, which is called LASERMELT, first solves for the silicon melt depth and melt time versus laser energy fluence, and then the impurity dopant profiles using a dopant incorporation and impurity diffusion model. Experimental and simulated dopant profiles and sheet resistance values are given as functions of the laser energy fluence and number of pulses. The determination of liquid phase impurity diffusion coefficients in molten silicon is also described.> Ettore Landi, Paul G. Carey, Thomas W. Sigmon |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |