EDBT 2026 Demo / reviewers in the wild / expert
Karen Kong
dblp:200/0262
· DBLP profile ↗
4ranked-venue papers
0as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Computer graphics and multimedia
1 paper |
Visual content generation and editing · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › design optimization
area optimization |
0.5 | 1 | 2021 | Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Electronic design automation
physical design |
0.5 | 1 | 2021 | Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Visual content generation and editing › image retargeting
seam carving |
0.1 | 1 | 2021 | Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
seam carving · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam CarvingabstractSeam carving is an algorithm that analyzes image content and can be used for size reduction in a manner that avoids direct compression or downscaling. Seam carving iteratively identifies horizontal and/or vertical paths of least visual importance and removes them from the image; each path removal reduces the length or width of the image by one row or column of pixels. This article adapts seam carving to reduce excess area of flow-based microfluidic chips that have been drawn by hand or by computer-aided heuristics without negatively impacting their functionality. The proposed approach leverages domain knowledge, wherein the image to be carved consists of I/O ports, components, and fluid channels, with known and understood fluidic behavior. Three different variants of seam carving are presented: 1) linear; 2) nonlinear; and 3) nonrectilinear; experimental results show that nonrectilinear, which is the most general of the three, yields the best results: it improves area utilization by 8.6× and reduces fluid routing channel length by 73% across a set of benchmark microfluidic designs. Brian Crites, Cody Falzone, Tristan Lopez, Karen Kong, Philip Brisk |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 2020 | Directed Placement for mVLSI DevicesabstractContinuous-flow microfluidic devices based on integrated channel networks are becoming increasingly prevalent in research in the biological sciences. At present, these devices are physically laid out by hand by domain experts who understand both the underlying technology and the biological functions that will execute on fabricated devices. The lack of a design science that is specific to microfluidic technology creates a substantial barrier to entry. To address this concern, this article introduces Directed Placement, a physical design algorithm that leverages the natural “directedness” in most modern microfluidic designs: fluid enters at designated inputs, flows through a linear or tree-based network of channels and fluidic components, and exits the device at dedicated outputs. Directed placement creates physical layouts that share many principle similarities to those created by domain experts. Directed placement allows components to be placed closer to their neighbors compared to existing layout algorithms based on planar graph embedding or simulated annealing, leading to an average reduction in laid-out fluid channel length of 91% while improving area utilization by 8% on average. Directed placement is compatible with both passive and active microfluidic devices and is compatible with a variety of mainstream manufacturing technologies. Brian Crites, Karen Kong, Philip Brisk |
ACM J. Emerg. Technol. Comput. Syst. | 2 |
| 2017 | Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam CarvingabstractThis paper introduces a technique based on seam carving to reduce the area of microfluidic very large scale integration (mVLSI) chips. Seam carving repeatedly identifies small slices of the device that can be safely removed (carved) and patched without adversely affecting device functionality. Using non-linear seam carving we achieve an average improvement of 4.28x in area utilization and an average reduction in fluid routing channel length of 53% Brian Crites, Karen Kong, Philip Brisk |
ACM Great Lakes Symposium on VLSI | 2 |
| 2017 | Diagonal Component Expansion for Flow-Layer Placement of Flow-Based Microfluidic BiochipsabstractContinuous flow-based microfluidic devices have seen a huge increase in interest because of their ability to automate and miniaturize biochemistry and biological processes, as well as their promise of creating a programmable platform for chemical and biological experimentation. The major hurdle in the adoption of these types of devices is in the design, which is largely done by hand using tools such as AutoCAD or SolidWorks, which require immense domain knowledge and are hard to scale. This paper investigates the problem of automated physical design for continuous flow-based microfluidic very large scale integration (mVLSI) biochips, starting from a netlist specification of the flow layer. After an initial planar graph embedding, vertices in the netlist are expanded into two-dimensional components, followed by fluid channel routing. A new heuristic, DIagonal Component Expansion (DICE) is introduced for the component expansion step. Compared to a baseline expansion method, DICE improves area utilization by a factor of 8.90x and reduces average fluid routing channel length by 47.4%. Brian Crites, Karen Kong, Philip Brisk |
ACM Trans. Embed. Comput. Syst. | 2 |