International audience

This paper presents an innovative integrated load-pull bench at 160 GHz. The proposed system, which is designed in a 55-nm BiCMOS technology, is tailored to deal with all of the measurement functions including signal generation, shaping, and magnitude and phase measurement. This system will allow precise characterization of Devices-Under-Test (DUTs) (i.e., circuits and/or devices) when integrated together with the DUT. In addition, the proposed system could also be envisioned as a System-on-Chip (SoC) that, when reported into an RF probe, could serve as a test bench for any integrated circuit.

This paper presents an innovative Through-Load element aimed at characterization applications at mm-wave frequencies. The proposed structure can behave as a Through connection or as a 50-Ω load depending on a DC control voltage. Among other potential applications, this system can be used to implement a transfer switch or an attenuator. A demonstrator was fabricated and measured in the STM 55-nm BiCMOS technology. Over a wide bandwidth, from 55 GHz up to 170 GHz, experimental measurements demonstrate a maximum 1.6-dB of insertion loss when behaving as a Through connection and a minimum 14-dB of insertion loss when behaving as a 50-Ω load. In both cases, the return loss is better than 10 dB. The insertion loss at 90 GHz is 0.6 dB for the Through connection and 20 dB for the 50-Ω load connection.

Beam-forming techniques using phased arrays are one of the most promising solutions for the practical implementation of future high-data-rate point-to-point communication protocols. The functionality of phased arrays is based on the use of phase shifters that should provide an accurate and controllable phase difference between the different paths of the array. However, the integration of phase shifters in current nanometric technologies is prone to imperfections that may affect the intended phase shift and degrade the performance of the antenna array. This requires extensive testing and calibration and represents a bottleneck in the production line of these system. In this work, we propose a simple Oscillation-Based Test technique that may be suitable for Built-In Self-Test applications of phase shifters. The technique is demonstrated on a Reflection-Type Phase Shifter implemented in a 55 nm BiCMOS technology. Electromagnetic and electrical simulation results show the feasibility of the proposed technique.

This work presents an efficient modification of the classical servo-loop static test setup aimed at the on-chip implementation of reduced-code static linearity test techniques. The proposed modified servo-loop provides a direct measurement of the width of a given ADC code without the need of an integrated voltmeter. The proposed measurement strategy is based on using a controlled step-wise ramp stimulus generator for exciting the ADC under test in such a way that the measurement of a code width can be determined in the digital domain by simply counting the number of ramp steps between two consecutive ADC output transitions. Moreover, the ability of the proposed servo-loop to target a given ADC code makes it very suitable for implementing advanced reduced-code static test techniques. This work analyses the performance limits of the proposed discrete-time servo-loop technique and explores its application to reduced-code linearity testing of pipeline ADCs.