Demo Data from EDBT 2026 / reviewers in the wild / expert
Danni Xiong
dblp:201/3578
· DBLP profile ↗
3ranked-venue papers
0as first author
1since 2021 · last 2021
0000-0001-6589-5472ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1Theory of computation · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Storage systems · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › data compression
transparent compression |
0.3 | 1 | 2017 | Realizing Transparent OS/Apps Compression in Mobile Devices at Zero Latency Overhead · IEEE Trans. Computers 2017 |
Storage systems › storage devices › storage media
mobile storage |
0.1 | 1 | 2017 | Realizing Transparent OS/Apps Compression in Mobile Devices at Zero Latency Overhead · IEEE Trans. Computers 2017 |
Methods — techniques the papers use, named apart from their topics
file system design · 0.3decompression offload · 0.3ASIC synthesis · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Integer k-matchings of graphs: k-Berge-Tutte formula, k-factor-critical graphs and k-barriers
Yan Liu 0030, Xueli Su, Danni Xiong |
Discret. Appl. Math. | 3 |
| 2018 | Realizing Low-Cost Flash Memory Based Video Caching in Content Delivery SystemsabstractTo implement caching devices in content delivery systems, flash memory is preferable to hard disk drives from the performance perspective. Nevertheless, the higher bit cost of flash memory is one major obstacle for the wide real-life deployment of flash-based video caching. This paper presents a set of design solutions to address this cost issue. First, we present a flash memory error tolerance design strategy customized for video data storage, which can enable the use of lower-cost less-reliable flash memory chips for video storage. The cost challenge can also be addressed by reducing the video storage footprint through on-the-fly transcoding. However, direct transcoding suffers from a high implementation cost. We propose two design techniques that can largely reduce the transcoding complexity at minimal storage overhead in flash memory. All the developed design solutions share the common feature of cohesively exploring the characteristics of video coding and flash memory device physics. Their effectiveness has been well demonstrated through experiments with 20-nm MLC NAND flash memory chips and extensive simulations with representative video sequences. Danni Xiong, Kai Zhao 0005, Chang Wen Chen, Tong Zhang 0002 |
IEEE Trans. Circuits Syst. Video Technol. | 2 |
| 2017 | Realizing Transparent OS/Apps Compression in Mobile Devices at Zero Latency OverheadabstractMotivated by the significant storage footprint of OS/Apps in mobile devices, this paper studies the realization of OS/Apps transparent compression. In spite of its obvious advantage, this feature however is not widely available in commercial mobile devices, which is due to the justifiable concern on the read latency penalty. In conventional practice on implementing transparent compression, read latency overhead comes from two aspects, including read amplification and decompression computational latency. This paper presents simple yet effective design solutions to eliminate the read amplification at the filesystem level and eliminate the computational latency overhead at the computer architecture level. To demonstrate its practical feasibility, we first implemented a prototyping filesystem to empirically verify the realization of transparent compression with zero read amplification. We further demonstrated that the OS/Apps footprint can be reduced by up to 39 percent on a Nexus 7 tablet installed with Android 5.0. Through application-specific integrated circuit (ASIC) synthesis, we show that the proposed computer architecture level design solution can eliminate the decompression latency overhead with very small silicon cost. Jiangpeng Li, Hao Wang 0042, Danni Xiong, Jerry Qu, Hyunsuk Shin, Jung Pill Kim, Tong Zhang 0002 |
IEEE Trans. Computers | 4 |