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Luigi Pietro Maria Colombo

dblp:202/3334 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2013
0000-0002-6637-1213ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 44% Energy-efficient computing · 44% Performance modeling and evaluation · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Energy-efficient computing › thermal modeling
compact thermal model
0.112009
A Model of BGA Thermal Vias as an Example of Lumped Parameter Analysis in Thermal Modeling of SiPs and Stacked Die Packages · Proc. IEEE 2009
Integrated circuit design
packaging
0.112009
A Model of BGA Thermal Vias as an Example of Lumped Parameter Analysis in Thermal Modeling of SiPs and Stacked Die Packages · Proc. IEEE 2009

Methods — techniques the papers use, named apart from their topics

lumped parameter analysis · 0.1finite element analysis · 0.1
YearPublicationVenuePosition
2013 An Experimental Platform Aimed at Long Lasting Electrophysiological Multichannel Recordings of Neuronal Cultures
Giulia Regalia, Emilia Biffi, Alberto Lucchini, M. Capriata, S. Achilli, Andrea Menegon, Giancarlo Ferrigno, Luigi Pietro Maria Colombo, Alessandra Pedrocchi
IJCCI8
2009 A Model of BGA Thermal Vias as an Example of Lumped Parameter Analysis in Thermal Modeling of SiPs and Stacked Die Packages
abstract
In this paper, a review of the different approaches to stationary thermal analysis of stacked die packages is presented, focusing on the opportunity to develop compact models suitable to be included in the design flow. Actually, although three-dimensional integration of the heat equation by numerical methods may provide an accurate estimate of the temperature distribution in the package, its main drawbacks lie in the relatively high computational cost and time consumption, together with the need of very experienced users. Simplified models are thus developed by gradually lumping thermal parameters of the various layers in order to attain a description of the device as a network of thermal resistances.
Luigi Pietro Maria Colombo, Davide Paleari, Alexey Petrushin
Proc. IEEE1