Satoshi Moriya

dblp:202/6277 · DBLP profile ↗
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12ranked-venue papers
6as first author
8since 2021 · last 2025
0000-0002-7764-5806ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 9 · 4 first-author · 5 since 2021Systems, architecture and hardware · 3 · 2 first-author · 3 since 2021
YearPublicationVenuePosition
2025 Event-Driven Inference with Spiking Neural Networks Enhanced by Non-Volatile Analog Spin-Orbit Torque Devices
abstract
Edge computing is becoming increasingly important, with the major challenge being the development of edge devices capable of performing tasks, such as classification and prediction, with high energy efficiency overcoming the limitations of the traditional von Neumann architecture. We propose an inference system based on a liquid state machine that combines spiking neural networks with non-volatile analog memory devices, inspired by information processing in the biological brain. Multiply accumulate operations were successfully demonstrated using three-terminal analog spintronics devices with a spin-orbit torque-induced magnetization switching as analog synaptic weights. This system operates in an event-driven manner based on spike events. Because the memory is non-volatile, the static power consumption is reduced to almost zero. This characteristic is particularly effective for edge devices that process low-frequency sensor signals, such as those used for keyword spotting or environmental monitoring.
Satoshi Moriya, Yosuke Iida, Aurélien Lagarrigue, K. Vihanga De Zoysa, Masaya Ishikawa, Hideaki Yamamoto, Sunsuke Fukami, Shigeo Sato
ISCAS1
2025 Directional intermodular coupling enriches functional complexity in biological neuronal networks
abstract
Hierarchically modular organization is a canonical network topology that is evolutionarily conserved in the nervous systems of animals. Within the network, neurons form directional connections defined by the growth of their axonal terminals. However, this topology is dissimilar to the network formed by dissociated neurons in culture because they form randomly connected networks on homogeneous substrates. In this study, we fabricated microfluidic devices to reconstitute hierarchically modular neuronal networks in culture (in vitro) and investigated how non-random structures, such as directional connectivity between modules, affect global network dynamics. Embedding directional connections in a pseudo-feedforward manner suppressed excessive synchrony in cultured neuronal networks and enhanced the integration-segregation balance. Modeling the behavior of biological neuronal networks using spiking neural networks (SNNs) further revealed that modularity and directionality cooperate to shape such network dynamics. Finally, we demonstrate that for a given network topology, the statistics of network dynamics, such as global network activation, correlation coefficient, and functional complexity, can be analytically predicted based on eigendecomposition of the transition matrix in the state-transition model. Hence, the integration of bioengineering and cell culture technologies enables us not only to reconstitute complex network circuitry in the nervous system but also to understand the structure-function relationships in biological neuronal networks by bridging theoretical modeling with in vitro experiments.
Nobuaki Monma, Hideaki Yamamoto, Naoya Fujiwara, Hakuba Murota, Satoshi Moriya, Ayumi Hirano-Iwata, Shigeo Sato
Neural Networks5
2025 Analog VLSI Implementation of Subthreshold Spiking Neural Networks and Its Application to Reservoir Computing
abstract
Neuromorphic computing achieves highly energy-efficient computations while adapting to environmental changes. Processing time series data by spiking neural networks can further reduce the power consumption of neuromorphic computing devices because most of the energy in the network is consumed only when the neuron generates and transmits a spike. In this study, we designed fully analog two-variable spiking neuron and spiking neural network circuits, taking advantage of the physical properties of transistors as analog devices. The energy consumption of the circuit for generating a spike was 22.7 fJ/spike when the MOS transistors were operating in the subthreshold region. The proposed circuits were implemented on an analog very large-scale integrated (VLSI) circuit chip in a$0.18~\mu $m CMOS process. The circuits exhibit complex spike dynamics even under subthreshold operation according to chip measurements. We demonstrated that the spike sequence generated by the spiking neural network circuit was successfully applied to spoken digit recognition tasks via a reservoir computing framework with 14.4 fJ/SOP efficiency. These results provide important insights into edge AI applications of SNN-based neuromorphic hardware.
Satoshi Moriya, Masaya Ishikawa, Satoshi Ono, Hideaki Yamamoto, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato
IEEE Trans. Circuits Syst. I Regul. Pap.1
2024 Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing
abstract
Edge computing requires low-power, real-time processing of complex information. Spiking neural networks are highly expected to be applied to edge computing due to their efficient computing properties. Here, we design a mixed-signal LSI consisting of an analog spiking neural network and digital inference circuits for edge device. The two-variable spiking neuron circuits operate in an analog manner using the physical properties of transistors and are connected through synaptic circuits to form a network. The neural network successfully operates and exhibits complex nonlinear behavior in response to external inputs. The power consumption of the spike generation is as low as tens of femtojoules per spike because the transistors in the circuits operate in the subthreshold region, which is enough to be used as edge computing devices. In addition, a digital circuit was designed to perform real-time inference using the spiking sequences from the analog spiking neural network. The result showed that the mixed-signal LSI consisting of the analog spiking neural network and the digital inference circuits can be applied to the spoken digit classification task in real time. The proposed system has the potential to be used as ultra-low-power neuromorphic hardware in practical applications.
Satoshi Moriya, Hideaki Yamamoto, Masaya Ishikawa, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato
IJCNN1
2024 Bifurcation phenomena observed from two-variable spiking neuron integrated circuit
abstract
A compact two-variable spiking neuron integrated circuit was proposed. Measurements of the circuit confirmed various types of spike responses with ultra-low power consumption. In this study, the two-variable spiking neuron circuit is modified to generate chaotic spike trains suitable for complex spatiotemporal information processing. The chaotic behavior is confirmed with time waveforms, return maps, bifurcation diagrams, and diversity index of inter-spike intervals through circuit simulations and experiments.
Takemori Orima, Yoshihiko Horio, Satoshi Moriya, Shigeo Sato
ISCAS3
2023 Real-Time Adaptive Physical Sensor Processing with SNN Hardware
Jordi Madrenas, Bernardo Vallejo Mancero, Josep Angel Oltra, Mireya Zapata, Jordi Cosp, Robert Calatayud, Satoshi Moriya, Shigeo Sato
ICANN (5)7
2022 A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation
abstract
Edge computing requires the processing of real-time and personalized information with low power consumption. Neuromorphic devices are promising candidates for applications related to edge computing. Rate neurons, which are typically used in neuromorphic hardware, persistently consume power regardless of their outputs. To further reduce the power consumption of neuromorphic devices, spiking neurons are more suitable because they are event-driven, and information is transferred only when the neuron fires. Herein, we propose a two-variable spiking neuron circuit that operates in a fully analog manner by utilizing the physical properties of transistors as analog devices. By operating in the subthreshold region of the MOS transistor, the energy required to produce a spike is approximately tens of fJ/spike. Furthermore, the analog neuron can exhibit complex spike dynamics, such as chattering, as confirmed using post-layout simulations. The simulations indicated that a neural network comprising the proposed neuron circuits operates successfully and exhibits complex nonlinear behavior. These results provide a basis for dedicated hardware spiking neuron circuits, which could be used as ultra-low-power neuromorphic hardware in various applications, such as realizing liquid-state machines for processing time-series signals.
Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas
IJCNN1
2021 A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model
Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, Jordi Madrenas
ICANN (5)2
2019 An Izhikevich Model Neuron MOS Circuit for Low Voltage Operation
Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Yoshihiko Horio, Shigeo Sato
ICANN (1)2
2019 Quantitative Analysis of Dynamical Complexity in Cultured Neuronal Network Models for Reservoir Computing Applications
abstract
Reservoir computing is a machine learning paradigm that was proposed as a model of cortical information processing in the brain. It processes information using the spatiotemporal dynamics of a large-scale recurrent neural network and is expected to improve power efficiency and speed in neuromorphic computing systems. Previous theoretical investigation has shown that brain networks exhibit an intermediate state of full coherence and random firing, which is suitable for reservoir computing. However, how reservoir performance is influenced by connectivity, especially which revealed in recent connectomics analysis of brain networks, remains unclear. Here, we constructed modular networks of integrate-and-fire neurons and investigated the effect of modular structure and excitatory-inhibitory neuron ratio on network dynamics. The dynamics were evaluated based on the following three measures: synchronous bursting frequency, mean correlation, and functional complexity. We found that in a purely excitatory network, the complexity was independent of the modularity of the network. On the other hand, networks with inhibitory neurons exhibited complex network activity when the modularity was high. Our findings reveal a fundamental aspect of reservoir performance in brain networks, contributing to the design of bio-inspired reservoir computing systems.
Satoshi Moriya, Hideaki Yamamoto, Ayumi Hirano-Iwata, Shigeru Kubota, Shigeo Sato
IJCNN1
2017 Complexity Reduction of Neural Network Model for Local Motion Detection in Motion Stereo Vision
Hisanao Akima, Susumu Kawakami, Jordi Madrenas, Satoshi Moriya, Masafumi Yano, Koji Nakajima, Masao Sakuraba, Shigeo Sato
ICONIP (6)4
2017 Modularity-dependent modulation of synchronized bursting activity in cultured neuronal network models
abstract
In a dissociated culture, neuronal networks spontaneously generate highly stereotypical activity characterized by synchronous bursting. With recent advancements in microfabrication technology, the topologies of cultured neuronal networks can now be engineered to have, e.g., the modular connectivity that is often found in vivo. In this paper, we construct networks of leaky integrate-and-fire neurons to theoretically investigate the effect of modular connectivity on the synchronous bursting activity of cultured neuronal networks. Modular network models are created by defining the number of modules and changing the connection formation probability within a given module, while maintaining a constant connection density. We find that the synchronized bursting frequencies in networks with the same numbers of neurons and connections are solely dependent on their modularity. We also investigate the mechanism behind the network-to-network variation of the activity in random networks, finding that local measures, such as the neuron in-degree and the self-connection, are the important factors. Out results indicate an economic advantage for networks bearing a modular structure and provides a graph-theoretical description of this mechanism.
Satoshi Moriya, Hideaki Yamamoto, Hisanao Akima, Ayumi Hirano-Iwata, Michio Niwano, Shigeru Kubota, Shigeo Sato
IJCNN1