With SRAM-based computing in-memory (CIM), parallel searching is implemented through the multi-row activation scheme, which necessitates words to be stored in the column-wise fashion. However, existing column-wise write schemes usually require multi-cycle and cause write performance degradation for the SRAM with only row access transistors. In this study, we propose a novel 10T SRAM with both row and column access transistors, supporting data writing across row and column without additional data moving, overcoming the above problem. Furthermore, the proposed SRAM features horizontal and vertical read ports to enable two-direction logic operations, search operation, and matrix transposition, significantly enhancing computational flexibility. Besides, the array can be used to perform arithmetic operations. The 10T SRAM design is validated in a 4 Kb array with a 40-nm CMOS technology. It achieves a frequency of 917 MHz at 1.1V for logic operations. For binary content-addressable memory (BCAM) search operations, the energy consumption is 0.82 fJ/search/bit at 0.7 V in the worst case, and the frequency is up to 807 MHz at 1.1V.

An accurate and robust localization system is crucial for autonomous vehicles (AVs) to enable safe driving in urban scenes. While existing global navigation satellite system (GNSS)-based methods are effective at locating vehicles in open-sky regions, achieving high-accuracy positioning in urban canyons such as lower layers of multi-layer bridges, streets beside tall buildings, tunnels, etc., remains a challenge. In this paper, we investigate the potential of cellular-vehicle-to-everything (C-V2X) wireless communications in improving the localization performance of AVs under GNSS-denied environments. Specifically, we propose the first roadside unit (RSU)-based cooperative localization framework, namely CV2X-LOCA, that only uses C-V2X channel state information to achieve lane-level positioning accuracy. CV2X-LOCA consists of four key parts: data processing module, coarse positioning module, environment parameter correcting module, and vehicle trajectory filtering module. These modules jointly handle challenges present in dynamic C-V2X networks. Extensive simulation and field experiments show that CV2X-LOCA achieves state-of-the-art performance for vehicle localization even under noisy conditions with high-speed movement and sparse RSU coverage environments. While focusing on AV localization, CV2X-LOCA also can extend to other C-V2X-equipped road users. The study results also provide insights into future investment decisions for transportation agencies regarding deploying RSUs cost-effectively.

Vehicular cooperative perception aims to provide connected and automated vehicles (CAVs) with a longer and wider sensing range, making perception less susceptible to occlusions. However, this prospect is dimmed by the imperfection of onboard localization sensors such as Global Navigation Satellite Systems (GNSS), which can cause errors in aligning over-the-air perception data (from a remote vehicle) with a Host vehicle’s (HV’s) local observation. To mitigate this challenge, we propose a novel LiDAR-based relative localization framework based on the iterative closest point (ICP) algorithm. The framework seeks to estimate the correct transformation matrix between a pair of CAVs’ coordinate systems, through exchanging and matching a limited yet carefully chosen set of point clouds and usage of a coarse 2D map. From the deployment perspective, this means our framework only consumes conservative bandwidth in data transmission and can run efficiently with limited resources. Extensive evaluations on both synthetic dataset (COMAP) and KITTI-360 show that our proposed framework achieves state-of-the-art (SOTA) performance in cooperative localization. Therefore, it can be integrated with any upper-stream data fusion algorithm and serves as a preprocessor for high-quality cooperative perception.

In order to enhance driving safety and identify potential hazards, next-generation intelligent vehicles will need to understand human drivers’ intentions and predict their potential maneuvers correctly. In a lane-change scenario, a driver’s head rotation measured by the in-cabin driver monitoring camera can serve as a reliable indicator to predict his/her intention. However, using a general model to predict each driver’s maneuver is not accurate, while directly sharing the personalized monitoring data to other intelligent vehicles raises the privacy concern. In this paper, we propose a clustering-based personalized federated learning framework (CPFL) to predict lane-change maneuver based on driver monitoring data. Personalization is added on top of the traditional federated learning (FL) through clustering, which separates and groups similar driving behaviors based on clustering parameters: head position threshold and average pre-lane-change preparation time. Long-Short Term Memory (LSTM) networks with different sequence lengths are deployed to predict lane changes in different clusters based on the lane-change preparation time. CPFL framework is trained and tested using the data collected from several human drivers under different driving scenarios through the Unity simulation platform. According to the results, CPFL’s average training efficiency is 7.6 times higher than the classic FedAvg approach, and CPFL also offers better adaptability to different driving behaviors than FedAvg with 4% higher accuracy, 0.2% fewer false positives, and 27.8% fewer false negatives.

This paper presents a 50-Gb/s optical receiver (ORX) chipset, consisting of a transimpedance amplifier (TIA) and a clock and data recovery (CDR) circuit in a 45-nm silicon-on-insulator CMOS. The proposed inverter-based TIA employs hybrid shunt-series peaking inductors to extend the bandwidth (BW). A baud-rate CDR is proposed to reduce the sampling phases and clocking power by half. To optimise the ORX for in- package integration, a compact-size digital loop is adopted in each channel, and the clock is recovered by phase interpolation from a shared reference. A complete optical-to-electrical (OE) link is built by integrating the proposed ORX with a high-speed Silicon Photonics (SiP) photodetector (PD). Measurements show that the proposed TIA has a transimpedance gain of 53 dB$\Omega $and a BW of 27 GHz. By integrating it with the SiP PD, the OE front-end (PD+TIA) achieves an input sensitivity of −7.7 dBm at 50 Gb/s and BER$ < 10^{-12}$. It features a power efficiency of 1.61 pJ/bit at a data rate of 64 Gb/s. The complete 50 Gb/s ORX achieves data recovery at a quarter rate of 12.5 Gb/s with an output jitter of 1.6 psrms, and has a 3.125 GHz clock with phase noise of −115.22 dBc/Hz at an offset frequency of 1 MHz.

This paper presents a hybrid-integrated optical transceiver front-end for beyond-400G short-reach optical links. A pair of the monolithic 8-channel laser drivers and the trans-impedance amplifier (TIA) is developed in 180nm SiGe BiCMOS, incorporating arrayed Vertical-Cavity-Surface- Emitting Lasers and photo-detectors. The driver uses a$2^{\mathrm {nd}}$-order continuous-time linear equalizer (CTLE) to compensate for the channel loss with a nonlinear frequency response. Both the inductive peaking and RC-degeneration are embedded at the output stage to extend the optical modulation bandwidth (BW). The series-peaking and multi-stage distributed CTLE are combined in a resistive feedback TIA topology for improved BW and linearity. Measurement results show up to 100-Gb/s PAM-4 electrical eyes of the driver and TIA. The optical transmitter front-end operates 56 Gb/s, 4.1-dB extinction ratio, and 6.6-pJ/bit power efficiency, while the optical receiver front-end achieves 56-Gb/s,$10^{-6}$bit error rate, and 5.9-pJ/bit power efficiency.