Sebastian Wallat

dblp:205/0383 · DBLP profile ↗
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5ranked-venue papers
1as first author
0since 2021 · last 2020
0000-0002-7429-1002ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-authorSecurity and privacy · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Hardware security and side channels · 61% Security and privacy of machine learning · 39%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
hardware reverse engineering
0.522020
Graph Similarity and its Applications to Hardware Security · IEEE Trans. Computers 2020
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019
Security and privacy of machine learning › poisoning attack
backdoor injection
0.412019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019
Hardware security and side channels
hardware trojan
0.412019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019
Security and privacy of machine learning › poisoning attack defense
trojan detection
0.412019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019
Hardware security and side channels › hardware trojan
hardware trojan detection
0.112020
Graph Similarity and its Applications to Hardware Security · IEEE Trans. Computers 2020
Electronic design automation
hardware verification and test
0.112019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019
Electronic design automation › circuit analysis
netlist analysis
0.112019
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion · IEEE Trans. Dependable Secur. Comput. 2019

Methods — techniques the papers use, named apart from their topics

static analysis · 0.8reverse engineering algorithms · 0.8logic insertion · 0.8multiresolutional spectral analysis · 0.4graph similarity · 0.4adjacency matrix · 0.4
YearPublicationVenuePosition
2020 Graph Similarity and its Applications to Hardware Security
abstract
Hardware reverse engineering is a powerful and universal tool for both security engineers and adversaries. From a defensive perspective, it allows for detection of intellectual property infringements and hardware Trojans, while it simultaneously can be used for product piracy and malicious circuit manipulations. From a designer's perspective, it is crucial to have an estimate of the costs associated with reverse engineering, yet little is known about this, especially when dealing with obfuscated hardware. The contribution at hand provides new insights into this problem, based on algorithms with sound mathematical underpinnings. Our contributions are threefold: First, we present the graph similarity problem for automating hardware reverse engineering. To this end, we improve several state-of-the-art graph similarity heuristics with optimizations tailored to the hardware context. Second, we propose a novel algorithm based on multiresolutional spectral analysis of adjacency matrices. Third, in three extensively evaluated case studies, namely (1) gate-level netlist reverse engineering, (2) hardware Trojan detection, and (3) assessment of hardware obfuscation, we demonstrate the practical nature of graph similarity algorithms.
Marc Fyrbiak, Sebastian Wallat, Sascha Reinhard, Nicolai Bissantz, Christof Paar
IEEE Trans. Computers2
2019 Insights into the mind of a trojan designer: the challenge to integrate a trojan into the bitstream
abstract
The threat of inserting hardware Trojans during the design, production, or in-field poses a danger for integrated circuits in real-world applications. A particular critical case of hardware Trojans is the malicious manipulation of third-party FPGA configurations. In addition to attack vectors during the design process, FPGAs can be infiltrated in a non-invasive manner after shipment through alterations of the bitstream. First, we present an improved methodology for bitstream file format reversing. Second, we introduce a novel idea for Trojan insertion.
Maik Ender, Pawel Swierczynski, Sebastian Wallat, Matthias Wilhelm 0002, Paul Martin Knopp, Christof Paar
ASP-DAC3
2019 Towards cognitive obfuscation: impeding hardware reverse engineering based on psychological insights
abstract
In contrast to software reverse engineering, there are hardly any tools available that support hardware reversing. Therefore, the reversing process is conducted by human analysts combining several complex semi-automated steps. However, countermeasures against reversing are evaluated solely against mathematical models. Our research goal is the establishment of cognitive obfuscation based on the exploration of underlying psychological processes. We aim to identify problems which are hard to solve for human analysts and derive novel quantification metrics, thus enabling stronger obfuscation techniques.
Carina Wiesen, Nils Albartus, Max Hoffmann 0001, Steffen Becker 0003, Sebastian Wallat, Marc Fyrbiak, Nikol Rummel, Christof Paar
ASP-DAC5
2019 Highway to HAL: open-sourcing the first extendable gate-level netlist reverse engineering framework
abstract
Since hardware oftentimes serves as the root of trust in our modern interconnected world, malicious hardware manipulations constitute a ubiquitous threat in the context of the Internet of Things (IoT). Hardware reverse engineering is a prevalent technique to detect such manipulations.
Sebastian Wallat, Nils Albartus, Steffen Becker 0003, Max Hoffmann 0001, Maik Ender, Marc Fyrbiak, Adrian Drees, Sebastian Maaßen, Christof Paar
CF1
2019 HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion
abstract
Hardware manipulations pose a serious threat to numerous systems, ranging from a myriad of smart-X devices to military systems. In many attack scenarios an adversary merely has access to the low-level, potentially obfuscated gate-level netlist. In general, the attacker possesses minimal information and faces the costly and time-consuming task of reverse engineering the design to identify security-critical circuitry, followed by the insertion of a meaningful hardware Trojan. These challenges have been considered only in passing by the research community. The contribution of this work is threefold: First, we present HAL, a comprehensive reverse engineering and manipulation framework for gate-level netlists. HAL allows automating defensive design analysis (e.g., including arbitrary Trojan detection algorithms with minimal effort) as well as offensive reverse engineering and targeted logic insertion. Second, we present a novel static analysis Trojan detection technique ANGEL which considerably reduces the false-positive detection rate of the detection technique FANCI. Furthermore, we demonstrate that ANGEL is capable of automatically detecting Trojans obfuscated with DeTrust. Third, we demonstrate how a malicious party can semi-automatically inject hardware Trojans into third-party designs. We present reverse engineering algorithms to disarm and trick cryptographic self-tests, and subtly leak cryptographic keys without any a priori knowledge of the design's internal workings.
Marc Fyrbiak, Sebastian Wallat, Pawel Swierczynski, Max Hoffmann 0001, Sebastian Hoppach, Matthias Wilhelm 0002, Tobias Weidlich, Russell Tessier, Christof Paar
IEEE Trans. Dependable Secur. Comput.2