Recently, the challenge of integrating an increasing number of transistors on a single die to adhere to Moores Law has spurred the need for innovative packaging solutions. Power/ground planes are integral to packages, and designers typically strive to maximize their size. This provides shielding and maintains constant impedance for adjacent high-speed signal wires, benefiting signal integrity. Additionally, large power/-ground planes help reduce DC IR drops, enhancing power integrity. However, the necessity for multiple power/ground nets, each requiring independent power/ground planes within a package, makes the optimal allocation of limited free space a complex task. This paper introduces a game-theoretic optimization method aimed at evenly mitigating DC IR drops across the multi-layer package power/ground planes. In the formulated game of achieving the ideal power/ground plane design, we can enhance the use of package space and realize a design with evenly distributed DC IR drops across all power/ground planes. This is accomplished by adjusting strategies and reaching a state of Nash equilibrium in the allocation of free space. Additionally, we propose a rapid multi-layer power/ground plane DC IR drop evaluation and a power/ground plane legalization method to bolster our optimization method.

As an emerging platform for biochemical experiments, flow-based microfluidic biochips are currently suffering from malfunctions caused by manufacturing defects, thereby having low yield. While many related studies have been conducted and reliability quantification models have been published, layout optimization methods are yet lacking. In this paper, we propose AutoRE, the first tool to automatically enhance reliability by optimizing layouts. AutoRE varies the layout within a certain range without changing its topology, and adopts Bayesian optimization (BO) to identify the most reliable variant. Experimental results demonstrate that AutoRE can efficiently and effectively improve the reliability across all testcases by around 40% on average.

Interposer-based packaging has emerged as a pivotal technology for integrating advanced logic and memory chiplets in artificial intelligence (AI) and high-performance computing (HPC) systems. To accommodate growing system complexity, ultra-large wafer-scale integration employs expanded silicon interposers to support more chiplets. However, manufacturing such interposers exceeds the limits of single-mask lithography, requiring mask stitching, a technique that introduces unique physical design constraints and structural discontinuities. Additionally, thermo-mechanical stress, particularly near through-silicon vias (TSVs) and stitching regions, poses critical reliability challenges that conventional floorplanning methods fail to address. This paper presents MMPack, a hierarchical analytical framework for multi-mask chiplet-package co-design. Our approach integrates three key innovations: (1) a performance-driven partitioning algorithm that minimizes inter-chiplet and inter-mask communication overhead; (2) a stitching-aware hierarchical floorplanning strategy based on alternating optimization to address mask boundary constraints; and (3) a stress-aware post-processing step that employs an analytical model to reduce critical stress concentrations while preserving floorplanning quality. Experimental results demonstrate that MMPack significantly enhances both architectural performance and mechanical reliability while maintaining efficient layout and runtime scalability. These results highlight the practicality of our framework for enabling robust, high-performance designs in next-generation wafer-scale integration systems.

Flow-based microfluidic biochips have emerged as a promising platform for biochemical experiments. These chips contain transportation channels and operational devices that are controlled by microvalves, which are actuated by external controllers. As the complexity of experiments conducted on these chips continues to increase, control multiplexers (MUXes) have become essential for actuating a large number of valves. However, current binary-coding-based MUXes do not fully utilize the coding capacity and suffer from reliability issues due to long total length of channels and high control channel density. In this article, we propose the combinatorial coding, a novel MUX coding strategy, along with an algorithm to synthesize combinatorial-coding-based MUXes (CoMUXes) of arbitrary sizes with the theoretical maximum coding capacity. We also develop a simplification method to reduce the number of valves and the total length of control channels in CoMUXes, thereby improving their reliability. Additionally, we develop a reliability-aware adaptation method to reliably integrate the CoMUXes into the main functional part of the designs. We compare CoMUX with state-of-the-art MUXes under different control demands with up to$10 \times 2^{13}$independent control channels. Experimental results show that CoMUXes can reliably address more independent control channels with fewer resources. For instance, when the number of control channels to be controlled is up to$10 \times 2^{13}$, compared to a state-of-the-art MUX, the optimized CoMUX reduces the number of required flow channels by 44% and the number of valves by 90%. The proposed adaptation method is also tested to be capable of significantly reducing area usage, total length of control channels, and the risk of having defects.

Control channels on microfluidic large-scale integration (mLSI) chips are prone to blockage and leakage defects. In this work, we propose a built-in self-test (BIST) method that drastically improves the test efficiency. Given n to-be-tested control channels, we reduced the number of test patterns for blockage and leakage tests from [EQUATION] to 1, and from ⌈log2(n + 1)⌉ to ⌈log2(χ(G) + 1)⌉, respectively, where χ(G) denotes the vertex chromatic number of a graph G consisting of n vertices. We fabricated our design and demonstrated the feasibility and efficiency of our method.

After decades of development, flow-based microfluidic biochips have become an increasingly attractive platform for biochemical experiments. The fluid transportation and the on-chip device operation are controlled by microvalves, which are driven by external pneumatic controllers. To meet the increasingly complex experimental demands, the number of microvalves has significantly increased, making it necessary to adopt multiplexers (MUXes) for the actuation of microvalves. However, existing MUX designs have limited coding capacities, resulting in area overhead and excessive chip-to-world interface. This paper proposes a novel gate structure for modifying the current MUX architecture, along with a mixed coding strategy that achieves the maximum coding capacity within the modified MUX architecture. Additionally, an efficient synthesis tool for the mixed-coding-based MUXes (LaMUXes) is presented. Experimental results demonstrate that the LaMUX is exceptionally efficient, substantially reducing the usage of pneumatic controllers and microvalves compared to existing MUX designs.

After decades of development, flow-based microfluidic biochips have become one of the most promising platforms for biochemical experiments. Control ports, which are remarkably area-consuming punch holes, are interfaces to external pneumatic controllers. To prevent the inserted outer catheters from hindering microscopic observation during experiments, control ports are placed on chip boundaries in practice. In this paper, we propose a practical and novel control layer escape routing methodology, which efficiently connects microvalves to user-specified boundaries. Particularly, the proposed methodology groups certain microvalves, and constructs a tree to connect them with the same control port, which is regarded as the root of the tree. Clustering more microvalves into the same group can reduce the usage of control ports, but will lead to more intensive connections among microvalves, which becomes larger obstacles for the routing of other microvalves outside the group, thereby reducing the routability. To derive an optimized tradeoff between the control port usage and the routability, we adapt a hierarchical clustering algorithm with a dynamically changing threshold that ascertains the closeness of the microvalves. We also adopt the Bayesian optimization (BO) to determine the optimized routing order for better routing results. Additionally, we propose a fault-tolerant structure as an option for users, which only occupies little area around control channels, and significantly improves the reliability against blockage defects. Experimental results demonstrate that the proposed methodology can efficiently connect all microvalves to user-specified boundaries, significantly reduce control port usage, shorten control channels, and improve reliability compared to baseline methods.

After decades of development, flow-based microfluidic biochips have become a revolutionary platform for biochemical experiments. To meet the increasingly complex experimental demands, the length and density of channels in these chips grow significantly, which brings about higher defect probabilities. Till now, several methods have been proposed to improve the yield of these increasingly complex chips. However, the effectiveness of these methods cannot be properly evaluated, since there has been no method that systematically analyzes the reliability of a microfluidic design. In this paper, we propose the first mathematical models to quantify the reliability of a microfluidic design by calculating the probability of blockage and leakage defects happening to the design. Besides, we propose a graph-transformer-based method to speed up the calculation, so that designers can have a fast and accurate evaluation of the reliability of a microfluidic design at any scale.

Flow-based microfluidic chips are one of the most promising platforms for biochemical experiments. Transportation channels and operation devices inside these chips are controlled by microvalves, which are driven by external pressure sources. As the complexity of experiments on these chips keeps increasing, control multiplexers (MUXes) become necessary for the actuation of the enormous number of valves. However, current binary-coding-based MUXes do not take full advantage of the coding capacity and suffer from the reliability problem caused by the high control channel density. In this work, we propose a novel MUX coding strategy, named Combinatorial Coding, along with an algorithm to synthesize combinatorial-coding-based MUXes (CoMUXes) of arbitrary sizes with the proven maximum coding capacity. Moreover, we develop a simplification method to reduce the number of valves and control channels in CoMUXes and thus improve their reliability. We compare CoMUX with the state-of-the-art MUXes under different control demands with up to 10 × 213 independent control channels. Experiments show that CoMUXes can reliably control more independent control channels with fewer resources. For example, when the number of the to-be-controlled control channels is up to 10 × 213, compared to a state-of-the-art MUX, the optimized CoMUX reduces the number of required flow channels by 44% and the number of valves by 90%.