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Sander Vocke

dblp:206/7195 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Programming languages and type systems · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 50% Hardware accelerators and domain-specific architectures · 50%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Programming languages and type systems
domain-specific languages
0.312017
Extending Halide to Improve Software Development for Imaging DSPs · ACM Trans. Archit. Code Optim. 2017
Programming languages and type systems › domain-specific languages
halide
0.312017
Extending Halide to Improve Software Development for Imaging DSPs · ACM Trans. Archit. Code Optim. 2017
Processor architecture and microarchitecture › special-purpose processor
digital signal processor
0.312017
Extending Halide to Improve Software Development for Imaging DSPs · ACM Trans. Archit. Code Optim. 2017
Hardware accelerators and domain-specific architectures
image processing pipeline
0.312017
Extending Halide to Improve Software Development for Imaging DSPs · ACM Trans. Archit. Code Optim. 2017

Methods — techniques the papers use, named apart from their topics

scratchpad memory management · 0.6SIMD · 0.6
YearPublicationVenuePosition
2017 Extending Halide to Improve Software Development for Imaging DSPs
abstract
Specialized Digital Signal Processors (DSPs), which can be found in a wide range of modern devices, play an important role in power-efficient, high-performance image processing. Applications including camera sensor post-processing and computer vision benefit from being (partially) mapped onto such DSPs. However, due to their specialized instruction sets and dependence on low-level code optimization, developing applications for DSPs is more time-consuming and error-prone than for general-purpose processors. Halide is a domain-specific language (DSL) that enables low-effort development of portable, high-performance imaging pipelines—a combination of qualities that is hard, if not impossible, to find among DSP programming models. We propose a set of extensions and modifications to Halide to generate code for DSP C compilers, focusing specifically on diverse SIMD target instruction sets and heterogeneous scratchpad memory hierarchies. We implement said techniques for a commercial DSP found in an Intel Image Processing Unit (IPU), demonstrating that this solution can be used to achieve performance within 20% of highly tuned, manually written C code, while leading to a reduction in code complexity. By comparing performance of Halide algorithms using our solution to results on CPU and GPU targets, we confirm the value of using DSP targets with Halide.
Sander Vocke, Henk Corporaal, Roel Jordans, Rosilde Corvino, Rick J. M. Nas
ACM Trans. Archit. Code Optim.1