Measuring the similarity of spike-trains is an essential operation for temporal neural coding, spike-based local learning rules, stereo vision and audio, for matching neuronal responses to their evoking stimuli, or for use as a loss function in supervised learning tasks in spiking neural networks. We present a novel spike-based temporal correlator and its accompanying analog subthreshold VLSI implementation, which can perform this operation accurately and efficiently. We discuss two potential applications of this primitive: (1) In event-based neuromorphic systems, it can be used to correlate spike-trains from multiple sources, e.g. pre- and post-synaptic spikes for spike-timing-dependent analog on-chip learning, or event-streams from multiple sensors like dynamic vision sensors and silicon cochleae for stereo-perception. (2) In (neuromorphic) neural interfaces the same framework can be used to correlate neural tissue activity with event-based stimuli, allowing us to identify the characteristic time-constant of the system, assuming integrative dynamics. We verify our results via schematic simulations in a 180nm process.

Many demanding applications of signal processing and neural networks require scalable, precise and energy efficient matrix-vector multipliers. Translinear MOS circuits, which use logarithmically compressed subthreshold voltages to control linear currents, could offer a particularly dense solution with high dynamic range. However, their susceptibility to Process, Voltage and Temperature (PVT) variations has thus far hindered their use in large arrays. Therefore, we propose a scalable translinear matrix-vector multiplier array, comprising only two transistors and one capacitor per cell, that offers very high PVT invariance. We employ two techniques to achieve this: first, we use dynamic current mirroring within the individual multiplier cells. Second, we store the matrix coefficients using a correlated double sampling (CDS) scheme that is highly invariant to process and voltage variations. To improve retention, stored weights are periodically refreshed through the same CDS scheme, which also compensates for 1/f noise and temperature variations. This refresh is fast and row parallel, allowing our proposed array to scale to millions of weights. We designed and verified the proposed architecture through transistor-level simulation in a 22 nm CMOS process. At less than 0.5 fJ per multiply-accumulate operation, this architecture is especially promising for scalable low-power applications.

Many proposed in-memory-computing systems use analog memristive crossbars to compute matrix-vector products over discrete domains. This yields analog outputs distributed around discrete values across a wide nominal range. Lossless quantization of this range requires costly high-precision analog-to-digital converters (ADCs), which limits the applicability of this approach. But typical results are highly concentrated in a small central region; hence, an ADC with lower resolution that only operates in this central region can achieve almost full accuracy at a fraction of the cost. In this paper, we explore how to appropriately choose ADC resolution and the covered region of interest, specifically for low-precision applications in approximate in-memory-computing. Our results reveal two distinct strategies: ADCs with sufficient resolution should (at least) capture the region of interest without loss, whereas lower-resolution ADCs should space their levels just enough to cover the region of interest. We argue that using this scheme could drastically improve power efficiency and thus scalability of compute-in-memory architectures.

A neuronal population is a computational unit that receives a multivariate, time-varying input signal and creates a related multivariate output. These neural signals are modeled as stochastic processes that transmit information in real time, subject to stochastic noise. In a stationary environment, where the input signals can be characterized by constant statistical properties, the systematic relationship between its input and output processes determines the computation carried out by a population. When these statistical characteristics unexpectedly change, the population needs to adapt to its new environment if it is to maintain stable operation. Based on the general concept of homeostatic plasticity, we propose a simple compositional model of adaptive networks that achieve invariance with regard to undesired changes in the statistical properties of their input signals and maintain outputs with well-defined joint statistics. To achieve such invariance, the network model combines two functionally distinct types of plasticity. An abstract stochastic process neuron model implements a generalized form of intrinsic plasticity that adapts marginal statistics, relying only on mechanisms locally confined within each neuron and operating continuously in time, while a simple form of Hebbian synaptic plasticity operates on synaptic connections, thus shaping the interrelation between neurons as captured by a copula function. The combined effect of both mechanisms allows a neuron population to discover invariant representations of its inputs that remain stable under a wide range of transformations (e.g., shifting, scaling and (affine linear) mixing). The probabilistic model of homeostatic adaptation on a population level as presented here allows us to isolate and study the individual and the interaction dynamics of both mechanisms of plasticity and could guide the future search for computationally beneficial types of adaptation.