EDBT 2026 Demo / reviewers in the wild / expert
Petar Jokic
dblp:206/8290
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4ranked-venue papers
2as first author
3since 2021 · last 2026
0000-0001-8846-4413ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Hardware-Algorithm Co-Design of a CORDIC-based Nonlinear Unit for low-power edge RNN inference
Nazareno Sacchi, Régis Cattenoz, Petar Jokic, Stéphane Emery, Tae-Kwang Jang |
ISCAS | 3 |
| 2023 | An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC AlgorithmabstractActivation functions (AFs) such as sigmoid and tanh play an important role in neural networks (NNs). Their efficient implementation is critical for always-on edge devices. In this work, we propose a serial-arithmetic architecture for AFs in edge audio applications using the CORDIC algorithm. The design enables to dynamically trade-off throughput/latency and accuracy, and pos-sesses higher area and power efficiency compared to conventional methods such as look-up table (LUT) and piece-wise linear (PWL)-based methods. Considering the throughput difference among the designs, we evaluate average power consumption taking into account active and idle working cycles for same applications. Synthesis results in a$\mathbf{22}\mathbf{nm}$process show that our CORDIC-based design has an area of 545.77$\boldsymbol{\mu} \mathbf{m}^{2}$and an average power of 0.69$\boldsymbol{\mu} \mathbf{W}$for a keyword spotting task, achieving a reduction of 36.92% and 71.72% in average power consumption compared to LUT and PWL-based implementations, respectively. Yaoxing Chang, Petar Jokic, Stéphane Emery, Luca Benini |
DATE | 2 |
| 2022 | A Construction Kit for Efficient Low Power Neural Network Accelerator DesignsabstractImplementing embedded neural network processing at the edge requires efficient hardware acceleration that combines high computational throughput with low power consumption. Driven by the rapid evolution of network architectures and their algorithmic features, accelerator designs are constantly being adapted to support the improved functionalities. Hardware designers can refer to a myriad of accelerator implementations in the literature to evaluate and compare hardware design choices. However, the sheer number of publications and their diverse optimization directions hinder an effective assessment. Existing surveys provide an overview of these works but are often limited to system-level and benchmark-specific performance metrics, making it difficult to quantitatively compare the individual effects of each utilized optimization technique. This complicates the evaluation of optimizations for new accelerator designs, slowing-down the research progress. In contrast to previous surveys, this work provides a quantitative overview of neural network accelerator optimization approaches that have been used in recent works and reports their individual effects on edge processing performance. The list of optimizations and their quantitative effects are presented as a construction kit, allowing to assess the design choices for each building block individually. Reported optimizations range from up to 10,000× memory savings to 33× energy reductions, providing chip designers with an overview of design choices for implementing efficient low power neural network accelerators. Petar Jokic, Erfan Azarkhish, Andrea Bonetti, Marc Pons 0001, Stéphane Emery, Luca Benini |
ACM Trans. Embed. Comput. Syst. | 1 |
| 2017 | Powering smart wearable systems with flexible solar energy harvestingabstractRecent advances in electrical sensing and flexible devices have demonstrated great potential in a wide range of applications including wearable devices for fitness and health care. Flexible plastic substrates, such as polyimide, or transparent conductive polyester are used to fabricate flexible devices that increase the comfort when they are worn by users or patients. However, one challenge that still limits the success of wearable devices is the limited lifetime especially in biomedical applications. Energy harvesting technology is one of the most promising approaches to address the short lifetime of wearable devices. However, harvesting energy for powering wearable devices is more challenging due to strict constraints in terms of size, weight and cost. In this work, we present the design of a wearable smart bracelet that uses thin-film small form factor flexible photovoltaic panels as energy source. The solar energy harvesting subsystem has been designed to maximize the energy conversion efficiency (up to 90%) to achieve a self-sustainable wireless wearable system. The full-system integration has been developed and assembled using polyamide film to realize a fully flexible smart bracelet for long term monitoring of patients or elderly people in healthcare applications. Preliminary in-field experiments show that a single flexible solar panel can harvest up to 16mW of power in outdoor and 0.21mW in indoor scenarios. We demonstrate that, the developed device, combining low power design and flexible energy harvesting, achieves perpetual work, acquiring one blood oxygenation measurement per minute and sending data via Bluetooth. Petar Jokic, Michele Magno |
ISCAS | 1 |