Orthogonal time frequency space (OTFS) modulation, combined with massive multiple-input-multiple-output (MIMO) technology, offers robust performance in high-mobility environments and high-user densities by capturing the full diversity of the wireless channel and effectively utilizing spatial multiplexing. This article introduces an adaptive block sparse backtracking (ABSB) algorithm designed to enhance channel estimation in OTFS with massive MIMO (massive MIMO-OTFS) systems. The proposed ABSB algorithm features dynamic block size adjustment based on the residual signal, improving its adaptability to the varying sparsity structure of the channel. Additionally, the algorithm extends the selection range of related block atoms to increase redundancy, reducing the risk of underfitting. Comprehensive simulation results demonstrate that the ABSB algorithm significantly outperforms traditional pilot-based methods in terms of channel estimation accuracy. It also surpasses the block orthogonal matching pursuit (BOMP) method as well as other classical compressed sensing methods. Specifically, the ABSB algorithm achieves up to a 20% reduction in estimation error compared to some of these traditional methods. The enhanced adaptability and robustness of the ABSB algorithm make it a promising solution for channel estimation in massive MIMO-OTFS systems, paving the way for more reliable and efficient next-generation wireless communications.

Energy harvesting promises to power billions of Internet of Things devices without being restricted by battery life. Since the energy harvester generally outputs weak and unstable energy, the system may suffer frequent and unpredictable power failures, thus falling into cyclically reboots without forward progress. The task-based intermittent computing system which periodically backs up system states into nonvolatile memory (NVM) is proposed to solve the nonprogress problem, with the nontrivial cost of frequent backups. How to reduce the backup overhead becomes a major research problem for intermittent computing. This article, for the first time, proposes to parallelize state backup and program execution with asynchronous direct memory access (DMA) to hide the backup latency into the program’s execution. But, straightforwardly executing the state backup and the program in parallel may cause an inconsistent system state. In specific, the system state may be modified by the program during backup, and therefore may be backed up incorrectly and further cause the system to deliver an incorrect computation result. We make a deep analysis on the system behavior and observe that, although the system state may be backed up incorrectly, the incorrect backup will be covered by the subsequent correct backups soon as the backup operations are performed frequently. In addition, only a small part of variables among all the program states may cause incorrect computation result. So, in this article, we aggressively allow incorrect backups to occur and propose a backup error detection method and a fault-tolerant backup management to guarantee the correctness of the system’s execution. To augment the parallel backup method, an adaptive execution method is further proposed to reduce the number of backups and balance the ratio between task execution time and backup latency. We design a run-time system to implement the proposed approach, and experimental results conducted on an STM32F7-based platform show that the proposed method can achieve a$2.6\times $average speedup.

Energy harvesting promises to power billions of Internet-of-Things devices without being restricted by battery life. The energy output of harvesters is typically weak and highly unstable, so computing systems must frequently back up program states into non-volatile memory to ensure a program will progress in the presence of frequent power failures. However, state backup is a time-consuming process. In existing solutions for this problem, state backup is conducted sequentially with program execution, which considerably impact system performance. This paper proposes techniques to parallelize state backup and program execution with asynchronous DMA. The challenge is that program states can be incorrectly backed up, which may further cause the program to deliver incorrect computation. Our main idea is to allow errors to occur in parallel state backup and program execution, and detect the errors at the end of the state backup. Moreover, we propose a technique that allows the system to tolerate backup errors during execution without harming logical correctness. We designed a run-time system to implement the proposed approach. Experimental results on an STM32F7-based platform show that execution performance can be considerably improved by parallelizing state backup and program execution.

Many computing systems, such as those powered by energy harvesting or deployed in harsh working environment, may experience unpredictable and frequent transient power failures in their life time. The systems may fail to deliver correct computation results or never progress, as computation is frequently interrupted by the power failures. A possible solution could be frequently saving program states to non-volatile memory (NVM), such as using checkpoints, so that the system can incrementally progress. However, this approach is too costly, since frequent NVM writes is time and energy consuming, and may wear out the NVM device. In this work, we propose an approach to enable a system to use volatile SRAM to correctly progress in the presence of transient power failures, since SRAM is capable of retaining its data for seconds or minutes with the charge remained in the battery/capacitor after the CPU core stops at its brown-out voltage. The main problem is to validate whether the data in SRAM are actually retained during power failures. In our approach, we validate only a subset of the program states with Cyclic Redundancy Check for efficiency. The validation technique requires maintaining a backup version of the program states, which additionally provides the system with the ability to progress incrementally. We implement a run-time system with the proposed approach. Experimental results on an MSP430 platform show that the system can correctly progress on SRAM in the presence of transient power failures with low overhead.

Internet-of-Things (IoT) devices can only afford very small batteries due to the size, weight, power and cost constraints. On the other hand, long battery life is expected for such devices, either for improving user experience or due to charging limitations. Therefore, it is critical to reduce the energy consumption of IoT devices. A good opportunity is to save energy on the system level, by letting the system to sleep occasionally. In this paper, we introduce Image Partitioning and Incremental Loading (IPIL), an operating-system-level sleep mechanism used in Huawei LiteOS to reduce the energy consumption of an IoT device. IPIL powers off both the CPU and the main memory during sleep to save as much energy as possible. Thus, system data have to be reloaded after the system wakes up, which may take a long time and thus reduce real-time responsiveness. To solve this problem, IPIL partitions the system image into clusters and incrementally loads the clusters on-demand, reducing the amount of data loading and time overhead in the wake-up step. Experimental results show that IPIL outperforms two widely adopted sleep approaches in terms of energy consumption. At the same time, IPIL offers satisfactory responsiveness with very short wake-up delay. We also present a case study on smart watch to demonstrate how battery life, as a core value of wearable devices, can be improved with IPIL provided by LiteOS.

Graininess noise is a common artifact in inkjet printing. While current inkjet printing technologies attempt to control graininess in single color images, the results are often less than optimal for multi-color images. This is due to fluidic interactions between inks of different colors. This paper will describe a color decomposition methodology that can be used to study ink flow patterns in multi-color inkjet printed images at a microscopic scale. This technique is used to decompose multi-color images into several independent color components. The ink patterns in these components are analyzed to relate them to visually perceptible graininess noise.

Energy harvesting promises to power billions of Internet-of-Things devices without being restricted by battery life. The energy output of harvesters is typically tiny and highly unstable, so the computing system must store program states into nonvolatile memory frequently to preserve the execution progress in the presence of frequent power failures. Task-based intermittent computing is a promising paradigm to provide such capability, where each task executes atomically and only states across task boundaries need to be saved. This article presents LATICS, a low-overhead adaptive task-based intermittent computing system, which dynamically decides the granularity of atomic execution to avoid unnecessarily frequent state saving when energy supply is sufficient. The novel feature of LATICS is to drastically reduce the amount of states to be saved at task boundaries compared with existing solutions. Notably, we disclose that skipping state saving at some task boundary may cause the system to store more states at other places, and thus leads to higher overall overhead. Therefore, LATICS enforces mandatory state saving at certain task boundaries regardless of the current energy condition to reduce state saving overhead. We implement LATICS on a real energy-harvesting platform based on MSP430 and experimentally compare against the state-of-the-art under different settings. The experimental results show that LATICS significantly reduces state saving overhead and improves execution efficiency compared to existing solutions.