Te I

dblp:207/1831 · DBLP profile ↗
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5ranked-venue papers
1as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Storage systems · 71% Emerging computing paradigms · 24% Cloud and datacenter computing · 5%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms
approximate computing
0.412019
Dynamic Multi-Resolution Data Storage · MICRO 2019
Storage systems › flash and SSD › flash memory management
flash translation layer
0.312017
Summarizer: trading communication with computing near storage · MICRO 2017
Storage systems › computational storage
in-storage computing
0.312017
Summarizer: trading communication with computing near storage · MICRO 2017
Storage systems › computational storage
near-storage computing
0.312017
Summarizer: trading communication with computing near storage · MICRO 2017
Storage systems › flash and SSD
solid-state drive
0.312017
Summarizer: trading communication with computing near storage · MICRO 2017
Cloud and datacenter computing
datacenter storage
0.112017
Summarizer: trading communication with computing near storage · MICRO 2017

Methods — techniques the papers use, named apart from their topics

multi-resolution storage · 0.4embedded core offloading · 0.3
YearPublicationVenuePosition
2021 Sentence Boundary Augmentation for Neural Machine Translation Robustness
abstract
Neural Machine Translation (NMT) models have demonstrated strong state of the art performance on translation tasks where well-formed training and evaluation data are pro-vided, but they remain sensitive to inputs that include errors of various types. Specifically, in the context of long-form speech translation systems, where the input transcripts come from Automatic Speech Recognition (ASR), the NMT models have to handle errors including phoneme substitutions, grammatical structure, and sentence boundaries, all of which pose challenges to NMT robustness. Through in-depth error analysis, we show that sentence boundary segmentation has the largest impact on quality, and we develop a simple data augmentation strategy to improve segmentation robustness.
Te I, Naveen Arivazhagan, Colin Cherry, Dirk Padfield
ICASSP2
2020 Re-Translation Strategies for Long Form, Simultaneous, Spoken Language Translation
abstract
We investigate the problem of simultaneous machine translation of long-form speech content. We target a continuous speech-to-text scenario, generating translated captions for a live audio feed, such as a lecture or play-by-play commentary. As this scenario allows for revisions to our incremental translations, we adopt a re-translation approach to simultaneous translation, where the source is repeatedly translated from scratch as it grows. This approach naturally exhibits very low latency and high final quality, but at the cost of incremental instability as the output is continuously refined. We experiment with a pipeline of industry-grade speech recognition and translation tools, augmented with simple inference heuristics to improve stability. We use TED Talks as a source of multilingual test data, developing our techniques on English-to-German spoken language translation. Our minimalist approach to simultaneous translation allows us to scale our final evaluation to several other target languages, dramatically improving incremental stability for all of them.
Naveen Arivazhagan, Colin Cherry, Te I, Wolfgang Macherey, Pallavi Baljekar, George F. Foster
ICASSP3
2019 Dynamic Multi-Resolution Data Storage
abstract
Approximate computing that works on less precise data leads to significant performance gains and energy-cost reductions for compute kernels. However, without leveraging the full-stack design of computer systems, modern computer architectures undermine the potential of approximate computing.
Yu-Ching Hu, Murtuza Lokhandwala, Te I, Hung-Wei Tseng 0001
MICRO3
2018 Pensieve: a Machine Learning Assisted SSD Layer for Extending the Lifetime
abstract
As the capacity per unit cost dropping, flash-based SSDs become popular in various computing scenarios. However, the restricted program-erase cycles still severely limit cost-effectiveness of flash-based storage solutions. This paper proposes Pensieve, a machine-learning assisted SSD firmware layer that transparently helps reduce the demand for programs and erases. Pensieve efficiently classifies writing data into different compression categories without hints from software systems. Data with the same category may use a shared dictionary to compress the content, allowing Pensieve to further avoid duplications. As Pensieve does not require any modification in the software stack, Pensieve is compatible with existing applications, file systems and operating systems. With modern SSD architectures, implementing a Pensieve-compliant SSD also requires no additional hardware, providing a drop-in upgrade for existing storage systems. The experimental result on our prototype Pensieve SSD shows that Pensieve can reduce the amount of program operations by 19%, while delivering competitive performance.
Te I, Murtuza Lokhandwala, Yu-Ching Hu, Hung-Wei Tseng 0001
ICCD1
2017 Summarizer: trading communication with computing near storage
abstract
Modern data center solid state drives (SSDs) integrate multiple general-purpose embedded cores to manage flash translation layer, garbage collection, wear-leveling, and etc., to improve the performance and the reliability of SSDs. As the performance of these cores steadily improves there are opportunities to repurpose these cores to perform application driven computations on stored data, with the aim of reducing the communication between the host processor and the SSD. Reducing host-SSD bandwidth demand cuts down the I/O time which is a bottleneck for many applications operating on large data sets. However, the embedded core performance is still significantly lower than the host processor, as generally wimpy embedded cores are used within SSD for cost effective reasons. So there is a trade-off between the computation overhead associated with near SSD processing and the reduction in communication overhead to the host system.
Gunjae Koo, Kiran Kumar Matam, Te I, Krishna Narra, Jing Li 0021, Hung-Wei Tseng 0001, Steven Swanson, Murali Annavaram
MICRO3