Demo Data from EDBT 2026 / reviewers in the wild / expert
Neil Veira
dblp:207/3982
· DBLP profile ↗
5ranked-venue papers
4as first author
0since 2021 · last 2020
0000-0002-2136-1142ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-authorSoftware engineering, systems software and programming languages · 2 · 1 first-authorArtificial intelligence and machine learning · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-authorTheory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Databases, data mining, and information retrieval
1 paper |
Knowledge graphs · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
hardware verification |
0.4 | 1 | 2020 | Searching for Bugs Using Probabilistic Suspect Implications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Electronic design automation › hardware verification and test › debugging
RTL debug |
0.4 | 1 | 2020 | Searching for Bugs Using Probabilistic Suspect Implications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Electronic design automation › hardware verification and test › debugging
SAT-based debugging |
0.4 | 1 | 2020 | Searching for Bugs Using Probabilistic Suspect Implications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Knowledge graphs
knowledge graph embedding |
0.4 | 1 | 2019 | Unsupervised Embedding Enhancements of Knowledge Graphs using Textual Associations · IJCAI 2019 |
Knowledge graphs
link prediction |
0.4 | 1 | 2019 | Unsupervised Embedding Enhancements of Knowledge Graphs using Textual Associations · IJCAI 2019 |
Methods — techniques the papers use, named apart from their topics
neural network classification · 0.4belief propagation · 0.4SAT solving · 0.4word embeddings · 0.4knowledge graph embedding · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Searching for Bugs Using Probabilistic Suspect ImplicationsabstractDue to the excessive cost associated with manual RTL design debugging, automated tools are often employed to identify a set of suspect bug locations. To further accelerate the process, one observes that the anytime behavior of these tools allows partial results to be analyzed before the suspect search is complete. Thus, it is preferable for the tool to maximize the number of suspects that are found in the early stages of its search. Toward this end, this article proposes a new SAT-based debugging algorithm which predicts where solutions are most likely to be found and prioritize examining these locations. Two techniques are proposed to predict solution locations by learning from historical debug data. The first technique does so using belief propagation on a probabilistic graph, while the second trains a neural network to classify candidate suspects as solutions or nonsolutions. Intensive empirical evaluation demonstrates that these techniques can predict suspect sets with accuracies of 81% and 87%, respectively, but the second method requires more training data and careful hyperparameter tuning in order to do so. Furthermore, when guided by these suspect prediction models, the proposed debugging algorithm finds an average of 83% more suspects within a given amount of time. Neil Veira, Zissis Poulos, Andreas G. Veneris |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2019 | Suspect2vec: a suspect prediction model for directed RTL debuggingabstractAutomated debugging tools based on Boolean Satisfiability (SAT) have greatly alleviated the time and effort required to diagnose and rectify a failing design. Practical experience shows that long-running debugging instances can often be resolved faster using partial results that are available before the SAT solver completes its search. In such cases it is preferable for the tool to maximize the number of suspects it returns during the early stages of its deployment. To capitalize on this observation, this paper proposes a directed SAT-based debugging algorithm which prioritizes examining design locations that are more likely to be suspects. This prioritization is determined by suspect2vec --- a model which learns from historical debug data to predict the suspect locations that will be found. Experiments show that this algorithm is expected to find 16% more suspects than the baseline algorithm if terminated prematurely, while still retaining the ability to find all suspects if executed to completion. Key to its performance and a contribution of this work is the accuracy of the suspect prediction model. This is because incorrect predictions introduce overhead in exploring parts of the search space where few or no solutions exist. Suspect2vec is experimentally demonstrated to outperform existing suspect prediction methods by an average accuracy of 5--20%. Neil Veira, Zissis Poulos, Andreas G. Veneris |
ASP-DAC | 1 |
| 2019 | Unsupervised Embedding Enhancements of Knowledge Graphs using Textual AssociationsabstractKnowledge graph embeddings are instrumental for representing and learning from multi-relational data, with recent embedding models showing high effectiveness for inferring new facts from existing databases. However, such precisely structured data is usually limited in quantity and in scope. Therefore, to fully optimize the embeddings it is important to also consider more widely available sources of information such as text. This paper describes an unsupervised approach to incorporate textual information by augmenting entity embeddings with embeddings of associated words. The approach does not modify the optimization objective for the knowledge graph embedding, which allows it to be integrated with existing embedding models. Two distinct forms of textual data are considered, with different embedding enhancements proposed for each case. In the first case, each entity has an associated text document that describes it. In the second case, a text document is not available, and instead entities occur as words or phrases in an unstructured corpus of text fragments. Experiments show that both methods can offer improvement on the link prediction task when applied to many different knowledge graph embedding models. Neil Veira, Brian Keng, Kanchana Padmanabhan, Andreas G. Veneris |
IJCAI | 1 |
| 2018 | Suspect set prediction in RTL bug huntingabstractWe propose a framework for predicting erroneous design components from partially observed solution sets that are found through automated debugging tools. The proposed method involves learning design component dependencies by using historical debugging data and representing these dependencies by means of a probabilistic graph. Using this representation, one can run a debugging tool non-exhaustively, obtain a partial set of potentially erroneous components and then predict the remaining by applying a cost-effective belief propagation pass. The method can reduce debugging runtime when it comes to multiple debugging sessions by 15x on the average while achieving a 91% average prediction accuracy. Neil Veira, Zissis Poulos, Andreas G. Veneris |
DATE | 1 |
| 2017 | Learning support sets in IC3 and Quip: The good, the bad, and the uglyabstractIn recent years, IC3 has enjoyed wide adoption by academia and industry as an unbounded model checking engine. The core algorithm works by learning lemmas that, given a safe property, eventually converge to an inductive proof. As such, its runtime performance is heavily dependent upon “pushing” (or “promoting”) important lemmas, possibly by discovering additional supporting lemmas. More recently, Quip has emerged to be a complementary extension behind the reasoning capabilities of IC3 as it allows it to target particular lemmas for pushing. This also raises the following question: which lemmas should be promoted? To that end, this paper extends the reasoning capabilities of IC3 and Quip using special SAT queries to find support sets that represent fine-grained information on which lemmas are required to push other lemmas. Further, this paper presents an IC3-based algorithm called Truss (Testing Reachability Using Support Sets) that uses support sets to identify sets of lemmas that may be close to forming an inductive proof. The set is targeted for promotion as a cohesive unit. If any of the lemmas cannot be promoted, the entire set is abandoned and a new set excluding that lemma is found. In the presented framework, there are two reasons why a lemma cannot be promoted: either because it blocks a known reachable state (in which case, the lemma is permanently marked as bad), or because lemma promotion exceeds a specified amount of effort (in which case the lemma is temporarily marked as ugly). Intuitively, the proposed approach allows the algorithm to construct a proof more quickly by focusing on the important yet easily-pushed lemmas. Experiments on the HWMCC'15 benchmark set show a significant improvement against existing practices. Compared to Quip, our algorithm solves 17 more problem instances and it offers an impressive 1.77× speedup. Ryan Berryhill, Alexander Ivrii, Neil Veira, Andreas G. Veneris |
FMCAD | 3 |