EDBT 2026 Demo / reviewers in the wild / expert
Phuoc Pham
dblp:208/4770
· DBLP profile ↗
4ranked-venue papers
4as first author
3since 2021 · last 2025
0000-0002-6388-1883ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author · 2 since 2021Artificial intelligence and machine learning · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Software testing · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
design optimization |
0.7 | 1 | 2023 | AGD: A Learning-based Optimization Framework for EDA and its Application to Gate Sizing · DAC 2023 |
Electronic design automation › physical design
gate sizing |
0.7 | 1 | 2023 | AGD: A Learning-based Optimization Framework for EDA and its Application to Gate Sizing · DAC 2023 |
Software testing
automated testing |
0.6 | 1 | 2022 | A Review of AI-augmented End-to-End Test Automation Tools · ASE 2022 |
Methods — techniques the papers use, named apart from their topics
reinforcement learning · 0.7neural network · 0.7gradient descent · 0.7machine learning · 0.6artificial intelligence · 0.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | AGD: Analytic Gradient Descent for Discrete Optimization in EDA and its Use to Gate SizingabstractIn electronic design automation (EDA), simulation models are often non-differentiable, and many design choices are discrete. As a result, greedy optimization methods based on numerical gradients are widely used, although they often lead to suboptimal solutions. In contrast, analytical methods may provide better solutions but require significant research effort. Reinforcement learning (RL) has been employed to address this problem; however, RL also suffers from notorious sample inefficiency, which is exaggerated in EDA because data sampling in EDA is very expensive due to slow simulations. This article proposes an alternative to RL for EDA, namely analytic gradient descent (AGD). Our method starts with a differentiable performance model, which can be either a learned surrogate or a static model. It then applies transformations similar to Shannon decomposition for each design variable in the performance model. Finally, one design option for each variable is selected using a one-hot variable, which is trained via a straight-through estimator (STE) through gradient descent. We demonstrate AGD on the well-known gate sizing problem using both a learned surrogate and a static model across 20 industrial benchmark circuits. Our experimental results show that the proposed method can outperform a several-decade-old commercial tool in the gate sizing task for 19 out of the 20 circuits. Phuoc Pham, Tae-Min Park 0001, Sung-Hyuk Cho, Tayyeb Mahmood, Joon-Sung Yang, Jaeyong Chung |
ACM Trans. Design Autom. Electr. Syst. | 1 |
| 2023 | AGD: A Learning-based Optimization Framework for EDA and its Application to Gate SizingabstractIn electronic design automation (EDA), most simulation models are not differentiable, and many design choices are discrete. As a result, greedy optimization methods based on numerical gradients have been used widely, although it suffers from suboptimal solutions. On the other hand, analytic methods may offer better solutions, but at the cost of enormous research efforts. Reinforcement learning (RL) has been leveraged to tackle this problem owing to its generality; however, RL also suffers from notorious sample inefficiency, which is exaggerated in EDA because data sampling in EDA is very expensive due to slow simulations. This paper proposes an alternative to RL for EDA, namely analytic gradient descent (AGD). Our method calculates analytic gradients of a design objective with respect to continuous and discrete design choices through a neural network learned by a simulation model. Then it performs a gradient descent procedure optimizing the design objective directly. We demonstrate AGD on the well-known gate sizing problem and show that our method can be very close to an industry-leading commercial tool in terms of design quality of result (QoR), while it only takes several person-months in comparison to dedicated efforts of human engineering over decades to develop. In addition, we also show that AGD can generalize to unseen circuits, with less training specific in a small amount of execution time. Phuoc Pham, Jaeyong Chung |
DAC | 1 |
| 2022 | A Review of AI-augmented End-to-End Test Automation ToolsabstractSoftware testing is a process of evaluating and verifying whether a software product still works as expected, and it is repetitive, laborious, and time-consuming. To address this problem, automation tools have been developed to automate testing activities and enhance quality and delivery time. However, automation tools become less effective with continuous integration and continuous delivery (CI/CD) pipelines when the system under test is constantly changing. Recent advances in artificial intelligence and machine learning (AI/ML) present the potential for addressing important challenges in test automation. AI/ML can be applied to automate various testing activities such as detecting bugs and errors, maintaining existing test cases, or generating new test cases much faster than humans. Phuoc Pham, Vu Nguyen 0003, Tien N. Nguyen |
ASE | 1 |
| 2017 | Evaluation of Deep Models for Real-Time Small Object Detection
Phuoc Pham, Tien Do, Thanh Duc Ngo, Duy-Dinh Le |
ICONIP (3) | 1 |