Demo Data from EDBT 2026 / reviewers in the wild / expert
Jan Rabcan
dblp:209/7752
· DBLP profile ↗
3ranked-venue papers
2as first author
1since 2021 · last 2022
0000-0003-2835-9114ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 2 first-author · 1 since 2021Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 38% Electronic design automation · 38% Memory systems · 23% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
multivalued logic circuit |
0.4 | 1 | 2020 | Development of Programmable Logic Array for Multiple-Valued Logic Functions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Electronic design automation › logic synthesis
programmable logic array |
0.4 | 1 | 2020 | Development of Programmable Logic Array for Multiple-Valued Logic Functions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Memory systems
emerging memory technologies |
0.1 | 1 | 2020 | Development of Programmable Logic Array for Multiple-Valued Logic Functions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Memory systems › non-volatile memory
ferroelectric memory |
0.1 | 1 | 2020 | Development of Programmable Logic Array for Multiple-Valued Logic Functions · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020 |
Methods — techniques the papers use, named apart from their topics
logic design · 0.4generalized reed-muller expression · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | EEG Signal Classification Based On Fuzzy ClassifiersabstractElectroencephalogram (EEG) signal classification is used in many applications. Typically, this classification is implemented based on methods which consist of two steps. These steps are known as the step of signal preprocessing and the step of the classification. The signal preprocessing step transforms initial signal into classification attributes. According to several studies, this transformation can result in the loss of some useful information and, consequently, the formed classification attributes are uncertain. This information loss can be taken into account if the classification attributes are fuzzy and the fuzzy classifiers are used at the step of classification itself. The transformation of initial EEG signal into fuzzy attributes needs one more procedure at the step of signal preprocessing. This procedure is fuzzification. An approach based on fuzzy classifiers for EEG signal classification is considered in this article. The approach is evaluated based on two classifiers: fuzzy decision tree and fuzzy random Forest. The classification accuracy is 99.5% for fuzzy decision tree and 99.3% for fuzzy random forest. The comparison with similar studies based on non-fuzzy classifiers indicates that fuzzy classifiers are effective tool for EEG signal classification and have best classification accuracy. Jan Rabcan, Vitaly G. Levashenko, Elena N. Zaitseva, Miroslav Kvassay |
IEEE Trans. Ind. Informatics | 1 |
| 2020 | Development of Programmable Logic Array for Multiple-Valued Logic FunctionsabstractThe binary information technology reaches its limits set by the atomic size miniaturization, by calculation speed and by the fundamental principle of energy dissipation per bit processing. Employing multiple-valued logic (MVL) cells as computing and memory units reduces energy losses and enables to pack of unprecedented high-density information, but the current silicon-based material technologies have been studied marginally for the material realization of MVL devices. Here, we propose to use the ferroelectrics for the implementation of MVL units using their ability to pin the polarization as a sequence of multistable states. More specifically, the realization of a programmable logic array (PLA) based on MVL units is considered with the application of the ferroelectrics technology in implementation of memory units. The specific of the PLA construction is the use of generalized Reed-Muller expression for the representation of an MVL function. In this article, several possible implementations of such PLAs are considered, and their properties are analyzed from the logic design point of view. Vitaly G. Levashenko, Igor Lukyanchuk, Elena N. Zaitseva, Miroslav Kvassay, Jan Rabcan, Patrik Rusnak |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 5 |
| 2019 | Application of Fuzzy Decision Tree for Signal ClassificationabstractA typical algorithm for signal classification consists of two steps: signal preliminary transformation and classification itself. The procedures of preliminary transformation are used to extract specific features of the initial signal and reduce its dimension for effective classification. The result of this transformation is information loss of initial signal, which implies uncertainty of data used in classification. This uncertainty can be taken into account by the application of fuzzy classifiers. In this paper, a new algorithm with application of fuzzy classifier is proposed for signal classification. A new procedure of fuzzification is added into the preliminary transformation and fuzzy decision tree is used for classification. The efficiency of this algorithm is examined based on the problem of detection of defective blades of an aircraft engine gas turbine. The experiments showed that the accuracy of the classification for the considered example is 0.989. This is the best result in comparison with other classification methods used to solve this problem. Jan Rabcan, Vitaly G. Levashenko, Elena N. Zaitseva, Miroslav Kvassay, Sergei Subbotin 0001 |
IEEE Trans. Ind. Informatics | 1 |