Rigid gang scheduling, which enables multiple threads of real-time tasks to execute concurrently on a fixed number of different processors, has recently gained attention. Compared to preemptive rigid gang scheduling, non-preemptive rigid gang (NPRG) scheduling improves predictability by requiring fewer context switches. However, NPRG scheduling is vulnerable to 2D-blocking, where lower-priority tasks can block a higher-priority task multiple times, leading to severe priority inversion at runtime and pessimism in schedulability analysis. The root cause is the work-conserving execution behavior, in which tasks are immediately executed whenever the required processors are idle, regardless of priority and the potential blocking of subsequent tasks. This paper focuses on the global fixed-priority NPRG scheduling and introduces the NPRG-SS scheduler. NPRG-SS leverages a selective stalling (SS) mechanism that selectively stalls lower-priority jobs whenever their execution could delay the start time of a higher-priority job in the ready queue. This non-work-conserving approach inherently mitigates multiple blocking. Additionally, we present the first schedulability analysis for NPRG scheduling with SS and propose a novel heuristic priority assignment technique, Iterative Priority Refinement (IPR). Experimental results show that NPRG-SS with IPR effectively mitigates priority inversion, accepts up to 42% more task sets than the baselines at runtime, while our proposed schedulability test accepts up to 80% more task sets than the baselines in worst-case scenarios.

This paper presents a compound scaling dynamic network architecture designed for real-time surface defect detection in industrial production lines, addressing the challenges posed by varying time constraints and computational resource allocation. We develope a lightweight UNet-based dynamic network using a ResNet-18 backbone, incorporating optional convolutional blocks at the end of each network stage to simultaneously scale network depth and width. To efficiently train this dynamic network, an incremental training strategy is proposed to minimize interference between different paths. The network is trained and tested on the Severstal Steel Defect Detection dataset, demonstrating that the compound scaling approach significantly improves accuracy at the same Floating Point Operations (FLOPs) cost compared to single-dimension scaling methods. Additionally, a scheduling algorithm is designed to dynamically allocate computational resources and adjust network levels, ensuring real-time requirements are met in multitask environments. Experimental results validate the robustness of this scheduling algorithm in handling both periodic and aperiodic tasks, as well as a increasing number of tasks. Under varying time constraints, our compound scaling approach shows higher defect detection accuracy by at most 4.0% and 4.6% respectively, compared to network depth-only scaling method and resolution-only scaling method, while mamtaining a quite low deadline miss rate under 0.3%.

In industrial sites, multiple real-time control systems often share computing resources. However, burst computing tasks may lead to the random dropping of control computing subtasks, resulting in control failures and potential hazards. To address this issue, we propose an energy-efficient safety-aware task scheduling scheme based on mixed-integer programming. When burst computing tasks are triggered, this scheduling scheme adaptively releases resources from low-criticality control computing sub tasks and adjusts the processor speed based on the dynamic voltage and frequency scaling technology (DVFS), ensuring the timely completion of burst computing tasks and keeping the control system state deviation within a safe threshold. To achieve the scheduling scheme, we propose an efficient algorithm called EESASA. Simulation results show that EESASA can minimize the overall cost of control and processor energy while ensuring the safety of the control system and the timely completion of burst computing tasks.

As very important controllers in automated facto-ries, the correctness and safety of Programmable Logic Controller (PLC) and their programs determine the stability of the production process. Structured Text (ST) is one of the most widely used PLC programming languages. However, there are not enough formal semantics and different venders may have their own implementations. In this work, a visual executable semantic model ST-Petri for ST has been proposed. The model uses Petri nets to formally represent ST semantics while using graphs to visualise program control flow. To validate the correctness of the semantic model, we use programs from Github and mutations of existing source programs as a test set to execute and compare the results with the open source OpenPLC platform. Experimental results show that ST-Petri has significant advantages in terms of compilation pass rate and error indication as a semantic model and a ST program compiler.

In the era of Industry 4.0, the execution of intelligent industrial applications relies on collaborations among multi-type devices, such as sensing, computing, and control devices. Al-though a universal information model allows for integrated device management, the model-building complexity rises dramatically with increasing system functions. To address this challenge, an integrated information model with hierarchical architecture is designed. By decoupling device functions, a separated rule is adopted for model construction such that the information model of each device only contains function-related nodes and common attributes for describing device features, reducing the complexity of information model construction. Then, an aggregation server is constructed, enabling application-oriented views. Based on this, efficient management is facilitated by displaying management information of corresponding applications in the user interface, reducing the complexity of integration of sensing, computing, and control devices. Finally, experimental results demonstrate the effectiveness of the proposed scheme. Compared to the standard OPC UA information model, in the aggregation server, the number of model nodes of each type of devices in the application-oriented view is reduced by 79.8% on average.

The increasing scale of industrial production is leading to a greater demand for communication and computing capabilities, thereby increasing the likelihood of resource competition and conflict. This can cause stochastic overall task latency (including communication and computing latency), resulting in the occurrence of overdue tasks. To guarantee deterministic delays, the integration of edge computing (EC) with time-sensitive networking (TSN) emerges as a promising technology. However, the deterministic feature of TSN increases vulnerabilities to attacks within this integration. Particularly, uncertain denial-of-service (DoS) attacks can exhaust system resources and disrupt determinacy, causing prolonged delays, or communication failures. To this end, this article proposes an attack-tolerant TSN-based edge computing (TSN-EC) architecture to guarantee task determinacy. Based on the architecture, a task-level no-wait scheduling mechanism of TSN is proposed under packet switching mode, which ensures deterministic communication delays. A robust and deterministic task offloading scheduling (RDTOS) strategy is developed to minimize the number of overdue tasks by identifying the worst-case scenario of uncertain DoS attacks, considering each task's importance. To reduce computational complexity, a two-layer decomposition algorithm is proposed by further decomposing the master problem of the conventional C-CG algorithm. Experimental results conducted on a TSN-EC testbed demonstrate the superiority of the RDTOS strategy in enhancing security and providing overall task determinacy compared to related algorithms.

Cross-lingual cross-modal retrieval aims at leveraging human-labeled annotations in a source language to construct cross-modal retrieval models for a new target language, due to the lack of manually-annotated dataset in low-resource languages (target languages). Contrary to the growing developments in the field of monolingual cross-modal retrieval, there has been less research focusing on cross-modal retrieval in the cross-lingual scenario. A straightforward method to obtain target-language labeled data is translating source-language datasets utilizing Machine Translations (MT). However, as MT is not perfect, it tends to introduce noise during translation, rendering textual embeddings corrupted and thereby compromising the retrieval performance. To alleviate this, we propose Noise-Robust Fine-tuning (NRF) which tries to extract clean textual information from a possibly noisy target-language input with the guidance of its source-language counterpart. Besides, contrastive learning involving different modalities are performed to strengthen the noise-robustness of our model. Different from traditional cross-modal retrieval methods which only employ image/video-text paired data for fine-tuning, in NRF, selected parallel data plays a key role in improving the noise-filtering ability of our model. Extensive experiments are conducted on three video-text and image-text retrieval benchmarks across different target languages, and the results demonstrate that our method significantly improves the overall performance without using any image/video-text paired data on target languages.

Due to numerous computation-intensive and delay-sensitive tasks in the Internet of Vehicles (IoV), Vehicular Edge Computing (VEC) is increasingly playing a crucial role as a key solution in the IoV. However, how to concurrently enhance communication quality and reduce the cost of latency and energy has emerged as a critical challenge in VEC. To tackle the above problem, we propose a Lyapunov-guided offloading based on the Soft Actor-Critic (SAC) algorithm, named LySAC, to minimize the average cost of the Integrated Sensing and Communications (ISAC) technology-aided IoV, where ISAC technology can effectively improve the communication quality by harnessing high-frequency waveforms to seamlessly integrate communication and sensing functionalities. First, we model the offloading process of ISAC-Aided IoV as an optimization problem of the joint cost of delay and energy with long-term energy consumption and queue stability. Then we formulate the optimization problem as a Lyapunov optimization and utilize the SAC method to find the optimal offloading decisions. Finally, we conduct extensive experiments and the results demonstrate the effectiveness and superiority of the proposed LySAC in minimizing total cost while maintaining queue stability and meeting long-term energy requirements compared with other several baseline schemes.