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Petr Golan

dblp:21/6953 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1988
0009-0001-2539-0880ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 72% Hardware reliability and fault tolerance · 28%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test		 0.021988
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage · IEEE Trans. Computers 1988
Design of Totally Self-Checking Checker for 1-out-of-3 Code · IEEE Trans. Computers 1984
Electronic design automation › hardware verification and test › test generation
pseudoexhaustive testing		 0.011988
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage · IEEE Trans. Computers 1988
Electronic design automation › hardware verification and test
test generation		 0.011988
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage · IEEE Trans. Computers 1988
Hardware reliability and fault tolerance
error-detecting codes		 0.011984
Design of Totally Self-Checking Checker for 1-out-of-3 Code · IEEE Trans. Computers 1984
Electronic design automation › hardware verification and test
fault detection		 0.011984
Design of Totally Self-Checking Checker for 1-out-of-3 Code · IEEE Trans. Computers 1984
Hardware reliability and fault tolerance
self-checking circuits		 0.011984
Design of Totally Self-Checking Checker for 1-out-of-3 Code · IEEE Trans. Computers 1984
Hardware reliability and fault tolerance › self-checking circuits
totally self-checking checker		 0.011984
Design of Totally Self-Checking Checker for 1-out-of-3 Code · IEEE Trans. Computers 1984
Electronic design automation › hardware verification and test
design for testability		 0.011988
Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage · IEEE Trans. Computers 1988

Methods — techniques the papers use, named apart from their topics

linear feedback shift register · 0.0fixed-weight code · 0.0
YearPublicationVenuePosition
1988 Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage
abstract
A method of pseudoexhaustive test pattern generation is proposed that is suitable above all for circuits using random access scan. Two linear feedback shift registers are used to generate scan addresses and test patterns to be scanned into these addresses. It is shown that the method gives better results than random testing.>
Petr Golan, Ondrej Novák, Jan Hlavicka
 IEEE Trans. Computers1
1984 Design of Totally Self-Checking Checker for 1-out-of-3 Code
abstract
A combinational totally self-checking checker for the 1-out-of-3 code using a combined fixed-weight code is presented. The design method is illustrated by an example.
Petr Golan
 IEEE Trans. Computers1