In practice, graphs are often massive and continuously changing, with updates ranging from a single edge to hundreds of thousands of edges at once. Reusing previously computed intermediate values significantly reduces processing time. However, current state-of-the-art streaming graph processing systems that guarantee Bulk Synchronous Parallel (BSP) semantics often exhibit lower performance, especially when dealing with small-batch mutations. To address this challenge, we propose source vertex suppression and develop SVSIG, a streaming graph processing system that incorporates this technique. Unlike existing approaches that check value changes independently for each batch, source vertex suppression tracks accumulated deviations across multiple batches, propagating updates only when the accumulated deviation exceeds a predefined threshold. Implemented with efficient lock-free atomic operations, this cross-batch accumulation paradigm fundamentally reduces redundant vertex and edge activations. We provide theoretical analysis with provable error bounds, showing that SVSIG’s approximation error is bounded and converges. SVSIG supports iterative and aggregation-based graph algorithms while ensuring results closely approximate BSP semantics. Experimental results demonstrate that SVSIG outperforms state-of-the-art streaming graph processing systems by an average of 11.68 × (up to 66.3 ×) for small-batch mutations, with average error far below the theoretical bound.

SpMV has been widely utilized and is regarded as a significant kernel in various scientific and engineering computing applications, where its parallel performance is heavily influenced by matrix sparsity and hardware architecture. Despite extensive prior research, static partitioning strategies that narrowly target computation or memory access remain a key performance bottleneck, severely stifling performance advancement of SpMV on modern multicore CPUs.

This paper studies the exponential synchronization issue of complex dynamic networks (CDNs) under dual-channel attacks by utilizing distributed delayed pinning impulsive control strategy. A dual-channel attack model with differentiated node attack probabilities is established by simultaneously considering replacement attacks in the sensor-to-controller channels and injection attacks in the controller-to-actuator channels. Within this approach, The novel concept of average delayed impulsive gains has been introduced to holistically measure the combined temporal influence of impulsive delays and gains across time. Furthermore, by use of the formula for the variation of parameters and applying comparison principle to hybrid delayed impulses, sufficient conditions for achieving the exponential synchronization of the networks are ultimately derived. Finally, numerical simulations verify the effectiveness and superiority of the proposed control strategy.

Abstract In recent years, many researchers have been using CPU for quantum computing simulation. However, in reality, the simulation efficiency of the large‐scale simulator is low on a single node. Therefore, striving to improve the simulator efficiency on a single node has become a serious challenge that many researchers need to solve. After many experiments, we found that much computational redundancy and frequent memory access are important factors that hinder the efficient operation of the CPU. This paper proposes a new powerful and simple quantum computing simulator: PAS (power and simple). Compared with existing simulators, PAS introduces four novel optimization methods: efficient hybrid vectorization, fast bitwise operation, memory access filtering, and quantum tracking. In the experiment, we tested the QFT (quantum Fourier transform) and RQC (random quantum circuits) of 21 to 30 qubits and selected the state‐of‐the‐art simulator QuEST (quantum exact simulation toolkit) as the benchmark. After experiments, we have concluded that PAS compared with QuEST can achieve a mean speedup of (QFT), (RQC) (up to , ) on the Intel Xeon E5‐2670 v3 CPU.

Mitochondria are subcellular organelles existing in most eukaryotic organisms. They have a pivotal role in lots of bio-chemical processes for cells. Proteins in different compartments of mitochondria have their transport routes. Locating proteins in mitochondria can provide a solid foundation for mitochondrial pathologies. So far, there have been several computational methods for solving the issue. However, their accuracy is so low that they do not identify the localization precisely. We develop an unsupervised learning model to represent mitochondrial proteins as n-dimensional vectors, called sequence embedding, which can learn the global and context information from mitochondrial proteins. We design a new model, called Sub-Loc, to predict the sub-mitochondrial localization of proteins using the SVM classifier and the sequence embedding method. The sequence embedding method and the Sub-Loc are tested by experiments. Experimental results show the sequence embedding method remarkably enhances the performance of prediction for sub-mitochondrial localization of proteins compared with other feature representations. The Sub-Loc outperforms other approaches for predicting sub-mitochondrial localization of proteins.

To solve the problems of large number of notifications, low relevance and no relevant knowledge base in the field of discipline inspection, a method of constructing a knowledge map of discipline inspection and supervision based on the BERT-BiLSTM-CRF model is proposed. Firstly, the unstructured data is collected from the content of the disciplinary inspection and supervision report. Through the bottom-up method the notification concept layer is constructed. By using deep learning models to extract entities. Then the entities and semantic relations are stored in the graph database Neo4j and displayed in the form of a knowledge graph. This method realizes the whole process from unstructured data to knowledge graph, and provides technical reference for the construction of domain-based knowledge graph. Simultaneously, the knowledge map of discipline inspection field established through the example can find the hidden association between those who break the law and discipline, prevent criminal facts in advance, and provide support and help for discipline inspection personnel to implement the spirit of the eight-point regulation of the Central Committee and continue to fight against the “four winds” and other actions.

To realize the prognostics and health management (PHM) of the mechanical system, it is the key to accurately predict the remaining useful life (RUL) of the equipment. The network captured features at different time steps will contribute to the final RUL prediction to varying degrees. Therefore, a deep learning network based on the attention mechanism is proposed. Firstly, the raw sensor data is passed to the Bi-LSTM network to capture the long-term dependence of features. Secondly, the features extracted by Bi-LSTM are passed to the attention mechanism for feature weighting, thereby giving greater weight to important features. Finally, the weighted features are input into the fully connected network to predict the RUL of the turbofan engine. Using the data set C-MAPSS to explore the feasibility of this method. The results show that this method is more accurate than other RUL prediction methods.

SpMV (Sparse matrix-vector multiplication) has attracted the attention of researchers in related fields at home and abroad. Of course, improving SpMV performance has also been a research hot spot for researchers in related fields. In this paper, we propose a new sparse matrix storage format CSR2 (Compressed Sparse Row 2) suitable for SIMD (Single Instruction Multiple Data)-accelerated SpMV. First, the format operation of CSR2 is easy to implement and has a low overhead of conversion. Second, CSR2 is a new single format and suitable for use on processor platforms with SIMD vectorization. We compare the SpMV algorithm based on CSR21with the one based on the current most advanced single format CSR5 (Compressed Sparse Row 5) on two mainstream high-performance processors: Intel Core i7-7700HQ CPU and Intel Xeon CPU E5-2670 v3. We choose 10 sets of regular matrices and 3 sets of irregular matrices to be used as benchmark suit. Experiments show that for the 13 sets of regular and irregular matrices in the benchmark suite, CSR2 has an average performance improvement of more than 50% compared to CSR5 (up to 125% on Intel Core i77700HQ CPU and 303% on Intel Xeon CPU E5-2670 v3). For applications with multiple iterations, in reality, using our CSR2 can bring low-overhead format conversion and high-throughput computing performance.