The Data Process Unit (DPU) specializes in offloading CPUintensive tasks and provides efficient fault tolerance through hardware-level isolation.This brings unique opportunities to develop persistent indexes with high performance and availability in High Performance Computing (HPC) systems.The recent learned index exploits machine learning models to efficiently fit data distributions, exhibiting superior performance and low storage costs, which is a promising alternative to traditional tree-based range indexes.However, state-of-the-art persistent learned indexes suffer from costly model retrainings and inefficient recovery mechanisms based on Non-Volatile Memory (NVM), making them inefficient to be offloaded to DPUs.To address these challenges, we propose DALdex, a CPU-DPU hybrid persistent learned index with high performance and availability.To mitigate model retraining overheads, DALdex offloads retraining tasks to DPU based on the incremental learning scheme.To minimize NVM amplifications, DALdex designs an NVM-friendly index structure that is decoupled into a DRAM-accelerated model layer and an NVM-aware block layer.Moreover, DALdex utilizes the hardware isolation feature of DPU to achieve seamless failover and instant recovery via the PCIe bus.Extensive evaluation results demonstrate that DALdex outperforms state-of-theart persistent indexes by 1.07-6.34×with minimal DRAM and NVM overheads.The open-source code of DALdex is available at https://github.com/CitySkylines/DALdex.

Distributed deep neural network (DNN) training is important to support artificial intelligence (AI) applications, such as image classification, natural language processing, and autonomous driving. Unfortunately, the distributed property makes the DNN training vulnerable to system failures. Check-pointing is generally used to support failure tolerance, which however suffers from high runtime overheads. In order to enable high-performance and low-latency checkpointing, we propose a lightweight checkpointing system for distributed DNN training, called LightCheck. To reduce the checkpointing overheads, we leverage fine-grained asynchronous checkpointing by pipelining checkpointing in a layer-wise way. To further decrease the checkpointing latency, we leverage the software-hardware co-design methodology by coalescing new hardware devices into our checkpointing system via a persistent memory (PM) manager. Experimental results on six representative real-world DNN models demonstrate that LightCheck offers more than 10× higher check-pointing frequency with lower runtime overheads than state-of-the-art checkpointing schemes. We have released the open-source codes for public use in https://github.com/LighT-chenml/LightCheck.git.

Multi‐carrier (MC) and spread‐spectrum (SS) are two good technologies for underwater acoustic (UWA) communications. In this study, the authors propose a novel MC chaos modulation scheme, which combines code‐shifted differential chaos shift keying (CS‐DCSK) with orthogonal frequency division multiplexing (OFDM), namely MC‐CS‐DCSK. The proposed scheme exploits the orthogonal characteristic of the Walsh code to superimpose the chaotic reference chips and the information bearing chips in the same time/frequency unit. Besides, a cyclic‐shift interleaver is used on chips to harvest frequency diversity. To the in‐depth understanding of the proposed system, the bit error rate (BER) of the proposed system under Gaussian channels and multipath Rayleigh fading channels are derived and verified by simulation. Furthermore, the spectral efficiency of the proposed system is analysed and compared with some existing chaos‐based communication systems. Finally, they study BER performance of the system under UWA channels and compare it with traditional MC direct sequence SS and OFDM‐based MC‐DCSK systems. Simulation results show that the system has good robustness under time‐varying UWA channels.

In this paper, a novel chaos modulation scheme, which combines code-shifted differential chaos shift keying (CS-DCSK) with orthogonal frequency division multiplexing (OFDM) is presented, namely OFDM-CS-DCSK. In the proposed scheme, the reference signal and the information bearing signal of CS-DCSK are firstly formed by Walsh code sequences, then different chips of the CS-DCSK signal are mapped onto different subcarriers of OFDM. Utilizing the characteristics of OFDM and CS-DCSK, the proposed scheme has robust performance over time-frequency doubly selective fading channel. In addition, the proposed system has low complexity because channel estimation, channel equalizer and the radio frequency (RF) delay circuits are not required at its receiver. By the computer simulations, bit error rate (BER) performances of the proposed scheme are compared with OFDM-DCSK and CS-DCSK under various channel parameters. Simulation results indicate that the proposed scheme has significant performance advantages over OFDM-DCSK and CS-DCSK in time-frequency doubly selective fading channel.