Large language models (LLMs) have emerged as one of the most impactful and transformative paradigms in natural language processing. Despite their remarkable success, the intensive computational demands and substantial memory footprint impose a significant barrier to efficient LLM inference.In this paper, we present a comprehensive solution to improve LLM inference performance under ultra-low weight precision, meticulously optimized through algorithm and architecture co-design. To achieve this, we first propose a fine-grained intra-cluster bit allocation method that partitions the weights into small clusters and explicitly considers the distribution of outliers and salient points within each cluster. Then, an intra-cluster protection mechanism is proposed to selectively preserve important weights during quantization, where an extended integer format and group-wise scale factor search are further introduced to mitigate accuracy degradation caused by aggressive bit-width reduction. Furthermore, we develop a memory-aligned encoding scheme to facilitate efficient memory access while enabling flexible identification of mixed-precision representations. Finally, we design a lightweight bit-level accelerator for low-bit LLM inference, offering simplified hardware design and enhanced adaptability through parallel bit-level computation. Compared to existing state-of-the-art quantization algorithms, our algorithm achieves higher model accuracy under ultra-low weight precision. Meanwhile, the proposed bit-level accelerator delivers speedups of 1.59×, 1.38×, and 1.61×, along with energy efficiency improvements of 1.52×, 1.42×, and 1.22× over ANT, OliVe, and FineQ, respectively.

Modern out-of-order processors call for more aggressive scheduling techniques such as priority scheduling and out-of-order commit to make use of increasing core resources. Since these approaches prioritize the issue or commit of certain instructions, they face the conundrum of providing the capacity efficiency of scheduling structures while preserving the ideal ordering of instructions. Traditional collapsible queues are too expensive for today's processors, while state-of-the-art queue designs compromise with the pseudo-ordering of instructions, leading to performance degradation as well as other limitations.

In this paper, we propose two different free-space-optics (FSO) coverage models for next-generation high-speed-train communications. To the best of our knowledge, these are the first coverage models proposed for FSO seamless handover. The models provide different coverage areas for performing seamless signal handover and uninterrupted ground-to-train communication. The first model uses two different wavelengths in adjacent covered areas and the second one uses a single wavelength. We find the optimal distance from the train track to a ground base station and the distance between base stations to provide seamless connectivity and handover while minimizing the number of base stations along the track. We base our estimations on a realistic model of an FSO system and provide numerical evaluations demonstrating the performance of the proposed coverage models. We show the different amounts of received power on ground-to-train communications as a function of the location of ground base stations. We also consider the effect of fog on the FSO link as the most attenuating condition for FSO communications. Our results show that communication rates of 1 Gpbs and higher may be achieved with the proposed station positioning and coverage models.